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参数资料
| 型号： | CH7013A-T |
| 厂商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Digital PC to TV Encoder |
| 中文描述： | 数码电脑电视编码器 |
| 文件页数： | 1/46页 |
| 文件大小： | 249K |
| 代理商： | CH7013A-T |
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201-0000-041 Rev. 1.0, 6/14/2000
1
CH7013A
CHRONTEL
Digital PC to TV Encoder
Features
Pin and function compatible with CH7003
Universal digital interface accepts YCrCb (CCIR601
or 656) or RGB (15, 16 or 24-bit) video data in both
non-interlaced and interlaced formats
True Scale
TM
rendering engine supports undescan
operations for various graphics resolutions
￥
Enhanced text sharpness and adaptive flicker removal
with up to 5-lines of filtering
Enhanced dot crawl control and area reduction
Fully programmable through serial port
Supports NTSC, NTSC-EIA (Japan), and PAL (B, D,
G, H, I, M and N) TV formats
Provides Composite, S-Video and SCART outputs
Auto-detection of TV presence
Supports VBI pass-through
Programmable power management
9-bit video DAC outputs
Complete Windows and DOS driver software
Offered in 44-pin PLCC, 44-pin TQFP
General Description
Chrontel’s CH7013A digital PC to TV encoder is a stand-
alone integrated circuit which provides a PC 99 compliant
solution for TV output. It provides a universal digital input
port to accept a pixel data stream from a compatible VGA
controller (or equivalent) and converts this directly into
NTSC or PAL TV format.
This circuit integrates a digital NTSC/PAL encoder with 9-
bit DAC interface, and new adaptive flicker filter, and high
accuracy low-jitter phase locked loop to create outstanding
quality video. Through its TrueScale
TM
scaling and de-
flickering engine, the CH7013A supports full vertical and
horizontal underscan capability and operates in 5 different
resolutions including 640x480 and 800x600.
A new universal digital interface along with full
programmability make the CH7013A ideal for system-level
PC solutions. All features are software programmable
through a serial port, to enable a complete PC solution
using a TV as the primary display.
Patent number 5,781,241
￥
Patent number 5,914,753
Figure 1: Functional Block Diagram
TRIPLE
DAC
PLL
RGB-YUV
CONVERTER
SYSTEM CLOCK
Y/R
CVBS/B
C/G
YUV-RGB CONVERTER
DIGITAL
INPUT
INTERFACE
SERIAL CONTROL
BLOCK
LINE
MEMORY
TRUE SCALE
SCALING & DEFLICKERING
ENGINE
TIMING & SYNC GENERATOR
NTSC/PAL
ENCODER
& FILTERS
D [15:0]
PIXEL DATA
XCLK
H
V
XI XO/FIN
P-OUT
CLOCK
DATA
ADDR
BCO
RSET
CSYNC
相关PDF资料 |
PDF描述 |
|---|---|
| CH7013A-V | Digital PC to TV Encoder |
| CHB1143 | CHB1143 |
| CHF12545CBF | 500 W Power RF Flanged Chip Termination |
| CHF12545CBF500L | 500 W Power RF Flanged Chip Termination |
| CHF12545CBF500R | 500 W Power RF Flanged Chip Termination |
相关代理商/技术参数 |
参数描述 |
|---|---|
| CH7013A-V | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Digital PC to TV Encoder |
| CH7013B | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Digital PC to TV Encoder |
| CH7013B-D | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Digital PC to TV Encoder |
| CH7013B-DF | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Digital PC to TV Encoder |
| CH7013B-DF-TR | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Digital PC to TV Encoder |
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