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参数资料
| 型号： | CMOD232+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 22/36页 |
| 文件大小： | 0K |
| 描述： | EVAL SYSTEM FOR MAX9850 |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 1 |
| 系列： | * |
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A master reading data from the MAX9850 transmits the
proper slave address followed by a series of nine SCL
pulses. The MAX9850 transmits data on SDA in sync with
the master-generated SCL pulses. The master acknowl-
edges receipt of each byte of data. Each read sequence
is framed by a START or REPEATED START condition, a
not acknowledge, and a STOP condition.
SDA operates as both an input and an open-drain out-
put. A pullup resistor, typically greater than 500
Ω, is
required on the SDA bus. SCL operates as an input only.
A pullup resistor, typically greater than 500
Ω, is required
on SCL if there are multiple masters on the bus, or if the
master in a single-master system has an open-drain SCL
output. Series resistors in line with SDA and SCL are
optional. Series resistors protect the digital inputs of the
MAX9850 from high-voltage spikes on the bus lines, and
minimize crosstalk and undershoot of the bus signals.
Bit Transfer
One data bit is transferred during each SCL cycle. The
data on SDA must remain stable during the high period
of the SCL pulse. Changes in SDA while SCL is high
are control signals (see the START and STOP
Conditions section). SDA and SCL idle high when the
I2C bus is not busy.
MAX9850
Stereo Audio DAC with DirectDrive
Headphone Amplifier
______________________________________________________________________________________
29
15 14 13 12 11 10 9
8
76543210
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
RIGHT
LEFT
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
15 14 13 12 11 10 9
8
76543210
RIGHT
LEFT
LRCLK
SDIN
BCLK
LRCLK
SDIN
BCLK
LEFT-JUSTIFIED
DIGITAL AUDIO REGISTER (0xA)
CONTENTS = 00000000
15
X
141312 1110 9
8
7
6
5
4
3
2
1
0
RIGHT
LEFT
LRCLK
SDIN
BCLK
I2S
DIGITAL AUDIO REGISTER (0xA)
CONTENTS = 00001000
RIGHT-JUSTIFIED
DIGITAL AUDIO REGISTER (0xA)
CONTENTS = 00000100
15
X
14 13 12 11 10 9
8
7
6543210
Figure 4. Right-Justified, and Left-Justified Audio Data Formats (Slave Mode, 16-Bit Data)
SCL
SDA
START
CONDITION
STOP
CONDITION
REPEATED
START
CONDITION
START
CONDITION
tHD, STA
tSP
tBUF
tSU, STO
tLOW
tSU, DAT
tHD, DAT
tHIGH
tR
tF
Figure 5. 2-Wire Interface Timing Diagram
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| CMOD232+ | 功能描述:界面开发工具 Cmod232+ Eval Kit RoHS:否 制造商:Bourns 产品:Evaluation Boards 类型:RS-485 工具用于评估:ADM3485E 接口类型:RS-485 工作电源电压:3.3 V |
| CMOD3003 | 功能描述:二极管 - 通用，功率，开关 ULTRAMINI SURFACE MOUNT RoHS:否 制造商:STMicroelectronics 产品:Switching Diodes 峰值反向电压:600 V 正向连续电流:200 A 最大浪涌电流:800 A 配置: 恢复时间:2000 ns 正向电压下降:1.25 V 最大反向漏泄电流:300 uA 最大功率耗散: 工作温度范围: 安装风格:SMD/SMT 封装 / 箱体:ISOTOP 封装:Tube |
| CMOD3003 BK | 制造商:Central Semiconductor Corp 功能描述:Diode Switching 180V 0.6A Box |
| CMOD3003 TR | 制造商:Central Semiconductor Corp 功能描述:Diodes - General Purpose, Power, Switching ULTRAMINI SURFACE MOUNT |
| CMOD3003_10 | 制造商:CENTRAL 制造商全称:Central Semiconductor Corp 功能描述:SURFACE MOUNT LOW LEAKAGE SILICON SWITCHING DIODE |
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