参数资料
型号: CMPWR101R
厂商: ON Semiconductor
文件页数: 6/7页
文件大小: 0K
描述: IC REG LDO 3.3V .25A SOIC8
产品变化通告: Product Discontinuation 30/Sept/2011
标准包装: 2,500
系列: SmartOR™
稳压器拓扑结构: 正,固定式
输出电压: 3.3V
输入电压: 最高 5.5V
稳压器数量: 1
电流 - 输出: 250mA(最小值)
电流 - 限制(最小): 275mA
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOICN
包装: 带卷 (TR)
CMPWR101
PERFORMANCE INFORMATION (Cont’d)
CMPWR101 Typical Thermal Characteristics
The overall junction to ambient thermal resistance ( q JA )
for device power dissipation (P D ) consists primarily of two
paths in series. The first path is the junction to the case ( q JC )
which is defined by the package style, and the second path
is case to ambient ( q CA ) thermal resistance which is
dependent on board layout. The final operating junction
temperature for any set of conditions can be estimated by the
following thermal equation:
T JUNC + T AMB ) P D ( q JC ) ) P D ( q CA )
+ T AMB ) P D ( q JA )
The CMPWR101 uses a standard SOIC package. When
this package is mounted on a double ? sided printed circuit
board with two square inches of copper allocated for “heat
spreading”, the resulting q JA is 85 ° C/W.
Based on a maximum power dissipation of 0.43 W
(1.7 V x 250 mA) with an ambient of 70 ° C, the resulting
junction temperature will be:
T JUNC + T AMB ) P D ( q JA )
+ 70° C ) 0.4 W (80° C D )
+ 70° C ) 37° C + 103° C
Thermal characteristics were measured using
a double ? sided board with two square inches of copper area
connected to the GND pin for “heat spreading”.
Measurements showing performance up to junction
temperature of 125 ° C were performed under light load
conditions (5 mA). This allows the ambient temperature to
Figure 13. Regulator V OUT vs. T AMB (250 mA Load)
Figure 14. Deselect Threshold vs. T JUNCT
be representative of the internal junction temperature.
NOTE: Note: The use of multi ? layer board construction
with separate ground and power planes will
further enhance the overall thermal
performance. In the event of no copper area
being dedicated for heat spreading, a multi ? layer
board construction, using only the minimum size
pad layout, will provide the CMPWR101 with
an overall q JA of 100 ° C/W which allows up to
500 mW to be safely dissipated.
Figure 15. Switch Resistance vs. Ambient
Temperature
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