参数资料
型号: CP2110-F01-GM
厂商: SILICON LABORATORIES
元件分类: 总线控制器
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, QCC24
封装: 4 X 4 MM, LEAD FREE, MO-220WGGD, QFN-24
文件页数: 5/26页
文件大小: 244K
代理商: CP2110-F01-GM
CP2110
Rev. 1.1
13
Figure 5. QFN-24 Recommended PCB Land Pattern
Table 9. QFN-24 PCB Land Pattern Dimensions
Dimension
Min
Max
Dimension
Min
Max
C1
3.90
4.00
X2
2.70
2.80
C2
3.90
4.00
Y1
0.65
0.75
E
0.50 BSC
Y2
2.70
2.80
X1
0.20
0.30
Notes:
General
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. This Land Pattern Design is based on the IPC-7351 guidelines.
Solder Mask Design
3. All metal pads are to be non-solder mask defined (NSMD). Clearance between the solder
mask and the metal pad is to be 60
m minimum, all the way around the pad.
Stencil Design
4. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used
to assure good solder paste release.
5. The stencil thickness should be 0.125 mm (5 mils).
6. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pads.
7. A 2 x 2 array of 1.10 x 1.10 mm openings on a 1.30 mm pitch should be used for the center
pad.
Card Assembly
8. A No-Clean, Type-3 solder paste is recommended.
9. The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small
Body Components.
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