参数资料
型号: CP82C84A
厂商: Intersil
文件页数: 3/11页
文件大小: 0K
描述: IC CLK GEN 5V 25MHZ 18-DIP
标准包装: 400
类型: 时钟发生器,时钟同步器,扇出配送
PLL:
输入: TTL
输出: TTL
电路数: 1
比率 - 输入:输出: 1:3
差分 - 输入:输出: 无/无
频率 - 最大: 25MHz
除法器/乘法器: 是/无
电源电压: 4.5 V ~ 5.5 V
工作温度: 0°C ~ 70°C
安装类型: 通孔
封装/外壳: 18-DIP(0.300",7.62mm)
供应商设备封装: 18-PDIP
包装: 管件
11
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN2974.3
December 6, 2005
Die Characteristics
DIE DIMENSIONS:
66.1 x 70.5 x 19
± 1mils
METALLIZATION:
Type: Si - AI
Thickness: 11k
± 1k
GLASSIVATION:
Type: SiO2
Thickness: 8k
± 1k
WORST CASE CURRENT DENSITY:
1.42 x 105 A/cm2
Metallization Mask Layout
82C84A
AEN1
PCLK
CSYNC
VCC
X1
RDY1
READY
RDY2
AEN2
CLK
GND
RESET
RES
OSC
X2
ASYNC
EFI
F/C
82C84A
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