参数资料
| 型号： | CRD42L52 |
| 厂商： | Cirrus Logic Inc |
| 文件页数： | 3/28页 |
| 文件大小： | 0K |
| 描述： | REFERENCE DESIGN FOR CS42L52 |
| 标准包装： | 1 |
| 主要目的： | 音频编解码器 |
| 嵌入式： | 是，MCU，8 位 |
| 已用 IC / 零件： | CS42L52 |
| 主要属性： | 2 个立体声模拟输入，立体声线路和耳机输出，S/PDIF 发射器和接收器 |
| 次要属性： | 图形用户界面 |
| 已供物品： | 板，CD |
| 产品目录页面： | 755 (CN2011-ZH PDF) |
| 相关产品： | CS42L52-DNZR-ND - IC CODEC STER HDPN/SPKR 40-QFN CS42L52-DNZ-ND - IC CODEC STER HDPN/SPKR 40-QFN CS42L52-CNZR-ND - IC CODEC STER HDPN/SPKR 40-QFN 598-1628-ND - IC CODEC STER HDPN & SPKR 40QFN |
| 其它名称： | 598-1580 |
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CRD42L52
LIST OF FIGURES
Figure 1.Quick-Start Guide ......................................................................................................................... 6
Figure 2.CRD42L52 and CDB42LDB1 Block Diagram for ADC and DAC Testing ..................................... 7
Figure 3.CRD42L52 and CDB42LDB1 Block Diagram for Digital Loopback Testing .................................. 8
Figure 4.CODEC Configuration Tab ......................................................................................................... 10
Figure 5.Analog Input Volume Tab ........................................................................................................... 11
Figure 6.DSP Engine Tab ......................................................................................................................... 12
Figure 7.Analog and PWM Output Volume Tab ........................................................................................ 13
Figure 8.Register Maps Tab ...................................................................................................................... 14
Figure 9.Dynamic Range - Line In to S/PDIF Out ..................................................................................... 15
Figure 10.Freq. Resp. - Line In to S/PDIF Out .......................................................................................... 15
Figure 11.THD + N - Line In to S/PDIF Out .............................................................................................. 15
Figure 12.FFT - S/PDIF In to HP Out @ 0 dBFS ...................................................................................... 15
Figure 13.FFT - S/PDIF In to HP Out @ -60 dBFS ................................................................................... 16
Figure 14.Dynamic Range - S/PDIF In to HP Out ..................................................................................... 16
Figure 15.Freq. Resp. - S/PDIF In to HP Out ............................................................................................ 16
Figure 16.THD + N - S/PDIF In to HP Out ................................................................................................ 16
Figure 17.Freq. Resp. - S/PDIF In to Spkr. Out ........................................................................................ 16
Figure 18.Dynamic Range - Line In to HP Out (Dig. LB) .......................................................................... 16
Figure 19.THD + N - Line In to HP Out (Dig. LB) ...................................................................................... 17
Figure 20.Block Diagram ........................................................................................................................... 19
Figure 21.CS42L52 and Analog I/O .......................................................................................................... 20
Figure 22.S/PDIF Input/Output .................................................................................................................. 21
Figure 23.Microcontroller, Push Buttons and LED Indicators ................................................................... 22
Figure 24.Silkscreen Top .......................................................................................................................... 23
Figure 25.Silkscreen Bottom ..................................................................................................................... 23
Figure 26.Top-Side Layer ......................................................................................................................... 23
Figure 27.Internal Layer (Ground Plane) .................................................................................................. 23
Figure 28.Internal Layer (Power Plane) .................................................................................................... 23
Figure 29.Bottom-Side Layer .................................................................................................................... 23
Figure 30.Silkscreen Top .......................................................................................................................... 24
Figure 31.Silkscreen Bottom ..................................................................................................................... 24
Figure 32.Top-Side Layer ......................................................................................................................... 25
Figure 33.Layer 2 ...................................................................................................................................... 25
Figure 34.Layer 3 ...................................................................................................................................... 26
Figure 35.Bottom-Side Layer .................................................................................................................... 26
LIST OF TABLES
Table 1. S/PDIF In to Headphone Out Performance Plots .......................................................................... 7
Table 2. Line In to S/PDIF Out Performance Plots ..................................................................................... 8
Table 3. S/PDIF In to Speaker Out Performance Plots ............................................................................... 8
DS680RD1
3
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