参数资料
型号: CS4218
厂商: Cirrus Logic, Inc.
元件分类: Codec
英文描述: 16-Bit Stereo Audio Codec
中文描述: 16位立体声音频编解码器
文件页数: 17/44页
文件大小: 586K
代理商: CS4218
SM3 and SM5 Subframe Bit Definitions for SDIN
Bit(s)
Symbol
1-16
DAC-LEFT
Description
Audio Data, DAC Left
2’s Complement data,
MSB first (Bit 1 = MSB)
Unused, write with 0’s
Mute DAC Outputs
0 = Outputs ON
1 = Outputs MUTED
Bit(s)
33-48
Symbol
DAC-RIGHT
Description
Audio Data, DAC Right
2’s Complement data,
MSB first (Bit 33 = MSB)
Unused, write with 0’s
Left Output Attenuation
1.5dB Increments.
00000 = no atten. (0dB)
11111 = 46.5dB atten.
Right Output Attenuation
1.5dB Increments.
00000 = no atten. (0dB)
11111 = 46.5dB atten.
Digital Output 1
0 = Output LOW
1 = Output HIGH
Digital Output 2
0 = Output LOW
1 = Output HIGH
17-21
22
unused
MUTE
49,50
51 - 55
unused
LA4 - LA0
23
ISL
Input Mux, Left Select
0 = LIN1
1 = LIN2
56 - 60
RA4 - RA0
24
ISR
Input Mux, Right Select
0 = RIN1
1 = RIN2
Left Input Gain
1.5dB Increments.
0000 = No gain (0dB)
1111 = 22.5 dB gain
Right Input Gain
1.5dB Increments.
0000 = No gain (0dB)
1111 = 22.5 dB gain
61
DO1
25-28
LG3 - LG0
62
DO2
29-32
RG3 - RG0
63,64
unused
Unused, write with 0’s
SM3 and SM5 Subframe Bit Definitions for SDOUT
Bit(s)
Symbol
1-16
ADC-LEFT
Description
Audio Data, ADC Left
2’s Complement data,
MSB first (Bit 1 = MSB)
These bits can be 0 or 1
Bit(s)
29-32
Symbol
VER3-VER0
Description
CS4218 Version Number
0000 = Rev A
1000 = Rev B and later
Audio Data, ADC Right
2’s Complement data,
MSB first (Bit 33 = MSB)
These bits can be 0 or 1
17-21
reserved
33-48
ADC-RIGHT
22
ADV
ADC Valid Data
0 = Invalid ADC data
1 = Valid ADC data
ADC Left Clipping
0 = Normal
1 = Clipping
ADC Right Clipping
0 = Normal
1 = Clipping
Error Word
0000 = Normal, no error
0001 = Input Sub-Frame
Bit 21 Set.
Control data is
ignored.
0010 = Sync Pulse Error
Outputs muted.
0011 = Soft PowerDown
Outputs muted.
49-60
reserved
23
LCL
61
DI1
Digital Input 1
0 = Input LOW
1 = Input HIGH
Digital Input 2
0 = Input LOW
1 = Input HIGH
Digital Input 3
0 = Input LOW
1 = Input HIGH
* SM3-S sub-modes only
24
RCL
62
DI2
25-28
ER3 - ER0
63*
DI3
64
unused
don’t care
Figure 13. SM3 / SM5 Subframe, Bit definitions
CS4218
DS135F1
17
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