参数资料
| 型号： | CS5157HGDR16G |
| 厂商： | ON Semiconductor |
| 文件页数： | 11/16页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR BUCK SYNC 5BIT 16-SOIC |
| 产品变化通告： | Product Obsolescence 24/Jan/2011 |
| 标准包装： | 1 |
| 应用： | 控制器，Intel Pentium? II |
| 输入电压： | 4.25 V ~ 20 V |
| 输出数： | 2 |
| 输出电压： | 1.3 V ~ 2.05 V，2.1 V ~ 3.5 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-SOIC |
| 包装： | 剪切带 (CT) |
| 其它名称： | CS5157HGDR16GOSCT |
CS5157H
5.0 V
R1
R3
10 k
Power Good
V OUT
CS5157H
10 k
R2
PN3904
PN3904
6.2 k
Figure 17. Implementing Power Good with the CS5157H
M 5.00 ms
Trace 4? 5.0 V from PC Power Supply (2.0 V/div.)
Trace 1? Regulator Output Voltage (1.0 V/div.)
Figure 15. OVP Response to an Input?to?Output Short
Circuit by Pulling the Input Voltage to Ground
External Output Enable Circuit
On/off control of the regulator can be implemented
through the addition of two additional discrete components
(see Figure 16). This circuit operates by pulling the
Soft?Start pin high, and the V FFB pin low, emulating a short
circuit condition.
5.0 V
MMUN2111T1 (SOT?23)
5 SS
CS5157H
M 2.50 ms
Trace 3 ? 12 V Input (V CC1 ) and (V CC2 ) (10 V/div.)
Trace 4? 5.0 V Input (2.0 V/div.)
Trace 1? Regulator Output Voltage (1.0 V/div.)
Trace 2? Power Good Signal (2.0 V/div.)
Figure 18. CS5157H Demonstration Board During
Power Up. Power Good Signal is Activated when
Output Voltage Reaches 1.70 V.
Selecting External Components
Shutdown
Input
IN4148
8 V
FFB
The CS5157H can be used with a wide range of external
power components to optimize the cost and performance of
a particular design. The following information can be used
as general guidelines to assist in their selection.
NFET Power Transistors
Figure 16. Implementing Shutdown with the CS5157H
External Power Good Circuit
An optional Power Good signal can be generated through
the use of four additional external components (see
Figure 17). The threshold voltage of the Power Good signal
can be adjusted per the following equation:
Both logic level and standard MOSFETs can be used. The
reference designs derive gate drive from the 12 V supply
which is generally available in most computer systems and
utilize logic level MOSFETs. Multiple MOSFETs may be
paralleled to reduce losses and improve efficiency and
thermal management.
Voltage applied to the MOSFET gates depends on the
VPower Good +
(R1 ) R2)
R2
0.65 V
application circuit used. Both upper and lower gate driver
outputs are specified to drive to within 1.5 V of ground when
This circuit provides an open collector output that drives
the Power Good output to ground for regulator voltages less
than V Power Good .
in the low state and to within 2.0 V of their respective bias
supplies when in the high state. In practice, the MOSFET
gates will be driven rail to rail due to overshoot caused by the
http://onsemi.com
11
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