参数资料
型号: CS5301GDWR32
厂商: ON Semiconductor
文件页数: 14/19页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM 32-SOIC
标准包装: 1
PWM 型: 电流/电压模式,V²?
输出数: 1
频率 - 最大: 1MHz
电源电压: 4.7 V ~ 20 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: 0°C ~ 70°C
封装/外壳: 32-SOIC(0.295",7.50mm 宽)
包装: 剪切带 (CT)
其它名称: CS5301GDWR32OSCT
CS5301
Ramp Size and Current Sensing
Because the current ramp is used for both the PWM ramp
and to sense current, the inductor and sense resistor values
will be constrained. A small ramp will provide a quick
transient response by minimizing the difference over which
the COMP pin must travel between light and heavy loads,
but a steady state ramp of 25 mVp?p or greater is typically
required to prevent pulse skipping and minimize pulse width
jitter. For resistive current sensing, the combination of the
inductor and sense resistor values must be chosen to provide
a large enough steady state ramp. For large inductor values
the sense resistor value must also be increased.
For inductive current sensing, the RC network must meet
the requirement of L/R L = R × C to accurately sense the AC
and DC components of the current the signal. Again the
values for L and R L will be constrained in order to provide
a large enough steady state ramp with a compensated current
sense signal. A smaller L, or a larger R L than optimum might
be required. But unlike resistive sensing, with inductive
sensing, small adjustments can be made easily with the
values of R and C to increase the ramp size if needed.
If RC is chosen to be smaller (faster) than L/R L , the AC
portion of the current sensing signal will be scaled larger
than the DC portion. This will provide a larger steady state
ramp, but circuit performance will be affected and must be
evaluated carefully. The current signal will overshoot during
transients and settle at the rate determined by R × C. It will
eventually settle to the correct DC level, but the error will
decay with the time constant of R × C. If this error is
excessive it will effect transient response, adaptive
positioning and current limit. During transients the COMP
pin will be required to overshoot along with the current
signal in order to maintain the output voltage. The V DRP pin
will also overshoot during transients and possibly slow the
response. Single phase overcurrent will trip earlier than it
would if compensated correctly and hiccup mode current
limit will have a lower threshold for fast rise step loads than
for slowly rising output currents.
The waveforms in Figure 13 show a simulation of the
current sense signal and the actual inductor current during a
positive step in load current with values of L = 500 nH,
R L = 1.6 m W , R1 = 20 k and C1 = .01 m F. For ideal current
signal compensation the value of R1 should be 31 k W . Due to
the faster than ideal RC time constant there is an overshoot of
50% and the overshoot decays with a 200 m s time constant.
Figure 13. Inductive Sensing waveform during a Step
with Fast RC Time Constant (50 m s/div)
Current Limit
Two levels of overcurrent protection are provided. Any
time the voltage on a Current Sense pin exceeds CS REF by
more than the Single Phase Pulse by Pulse Current Limit, the
PWM comparator for that phase is turned off. This provides
fast peak current protection for individual phases. The
outputs of all the currents are also summed and filtered to
compare an averaged current signal to the voltage on the
I LIM pin. If this voltage is exceeded, the fault latch trips and
the Soft Start capacitor is discharged by a 5.0 m A source
until the COMP pin reaches 0.2 V. Then Soft Start begins.
The converter will continue to operate in this mode until the
fault condition is corrected.
Overvoltage Protection
Overvoltage protection (OVP) is provided as a result of
the normal operation of the Enhanced V 2 control topology
with synchronous rectifiers. The control loop responds to an
overvoltage condition within 400 ns, causing the top
MOSFET’s to shut off and the synchronous MOSFET’s to
turn on. This results in a “crowbar” action to clamp the
output voltage and prevent damage to the load. The regulator
will remain in this state until the overvoltage condition
ceases or the input voltage is pulled low.
With this compensation the I LIM pin threshold must be set
more than 50% above the full load current to avoid triggering
hiccup mode during a large output load step.
http://onsemi.com
14
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