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参数资料
| 型号： | CS5332GDW28 |
| 厂商： | ON SEMICONDUCTOR |
| 元件分类： | 稳压器 |
| 英文描述： | 1.5 A SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PDSO28 |
| 封装： | SOP-28 |
| 文件页数： | 6/20页 |
| 文件大小： | 400K |
| 代理商： | CS5332GDW28 |
CS5332
http://onsemi.com
14
order to reduce voltage excursions during transients.
Adaptive voltage positioning can reduce peakpeak output
voltage deviations during load transients and allow for a
smaller output filter. The output voltage can be set higher
than nominal at light loads to reduce output voltage sag
when the load current is stepped up and set lower than
nominal during heavy loads to reduce overshoot when the
load current is stepped up. For low current applications a
droop resistor can provide fast accurate adaptive
positioning. However at high currents, the loss in a droop
resistor becomes excessive. For example, in a 50 A
converter a 1.0 mΩ resistor to provide a 50 mV change in
output voltage between no load and full load would dissipate
2.5 Watts.
Lossless adaptive positioning is an alternative to using a
droop resistor, but must respond quickly to changes in load
current. Figure 14 shows how adaptive positioning works.
The waveform labeled normal shows a converter without
adaptive positioning. On the left, the output voltage sags
when the output current is stepped down and later
overshoots when current is stepped back down. With fast
(ideal) adaptive positioning the peak to peak excursions are
cut in half. In the slow adaptive positioning waveform the
output voltage is not repositioned quickly enough after
current is stepped up and the upper limit is exceeded.
Adaptive Positioning
Normal
Fast
Slow
Limits
Figure 14. Adaptive Positioning
The CS5332 can be configured to adjust the output
voltage based on the output current of the converter. (Refer
to Figure 1.)
To set the noload positioning, a resistor is placed
between the output voltage and VFB pin. The VFB bias
current will develop a voltage across the resistor to decrease
the output voltage. The VFB bias current is dependent on the
During no load conditions the VDRP pin is at the same
voltage as the VFB pin, so none of the VFB bias current flows
through the VDRP resistor. When output current increases
the VDRP pin increases proportionally and the VDRP pin
current offsets the VFB bias current and causes the output
voltage to decrease.
The VFB and VDRP pins take care of the slower and DC
voltage positioning. The first few μs are controlled primarily
by the ESR and ESL of the output filter. The transition
between fast and slow positioning is controlled by the ramp
size and the error amp compensation. If the ramp size is too
large or the error amp too slow there will be a long transition
to the final voltage after a transient. This will be most
apparent with lower capacitance output filters.
Note: Large levels of adaptive positioning can cause pulse
width jitter.
Error Amp Compensation
The transconductance error amplifier requires a capacitor
between the COMP pin and GND. Use of values less than 1.0
nF may result in error amp oscillation of several MHz.
The capacitor between the COMP pin and the inverting
error amplifier input and the parallel resistance of the VFB
resistor and the VDRP resistor are used to roll off the error
amp gain. The gain is rolled off at a high enough frequency
to give a quick transient response, but low enough to cross
zero dB well below the switching frequency to minimize
ripple and noise on the COMP pin.
UVLO
The CS5332 has undervoltage lockout functions
connected to two pins. One, intended for the logic and
lowside drivers, with a 4.4 V turnon threshold is
connected to the VCCL pin. A second, for the high side
drivers, has a 2.0 V threshold and is connected to the VCCH1
pin.
The UVLO threshold for the high side drivers was chosen
at a low value to allow for flexibility in the part and an input
voltage as low as 3.3 V. In many applications this will be
disabled or will only check that the applicable supply is on
not that it is at a high enough voltage to run the converter.
high side driver is pulled up by the 5.0 V supply (through two
diode drops) and the function is not used. The diode between
the Soft Start pin and the 12 V supply holds the Soft Start pin
near GND and prevents startup while the 12 V supply is off.
In an application where a higher UVLO threshold is
necessary a circuit like the one in Figure 15 will lock out the
converter until the 12 V supply exceeds 9.0 V.
Figure 15. External UVLO Circuit
Soft Start
100 k
50 k
+5.0 V
+12 V
Remote Sense
In some applications that require remote output voltage
sensing, there are conditions when the path of the feedback
signal can be broken. In a voltage regulator module (VRM)
the remote voltage feedback sense point is typically off the
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