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| 型号： | CS5346-DQZ |
| 厂商： | CIRRUS LOGIC INC |
| 元件分类： | ADC |
| 中文描述： | 2-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PQFP48 |
| 封装： | LEAD FREE, MS-022, LQFP-48 |
| 文件页数： | 16/40页 |
| 文件大小： | 402K |
| 代理商： | CS5346-DQZ |
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DS861PP2
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CS5346
5.4
Analog Input Multiplexer, PGA, and Mic Gain
The CS5346 contains a stereo 6-to-1 analog input multiplexer followed by a programmable gain amplifier
(PGA). The input multiplexer can select one of six possible stereo analog input sources and route it to the
PGA. Analog inputs 4A and 4B are able to insert a +32 dB (+40x) gain stage before the input multiplexer,
allowing them to be used for microphone-level signals without the need for any external gain. The PGA
stage provides
12 dB (4x) adjustment in 0.5 dB steps. Figure 9 shows the architecture of the input multi-
plexer, PGA, and microphone gain stages.
The ““Analog Input Selection (Bits 2:0)” on page 34” outlines the bit settings necessary to control the input
multiplexer and mic gain. “Channel B PGA Control - Address 07h” on page 32 and “Channel A PGA Control
- Address 08h” on page 33 outline the register settings necessary to control the PGA. By default, line-
level input 1 is selected, and the PGA is set to 0 dB.
5.5
Input Connections
The analog modulator samples the input at 6.144 MHz (MCLK=12.288 MHz). The digital filter will reject sig-
nals within the stopband of the filter. However, there is no rejection for input signals which are
(n
6.144 MHz) the digital passband frequency, where n=0,1,2,... Refer to the Typical Connection Diagram
for the recommended analog input circuit that will attenuate noise energy at 6.144 MHz. The use of capac-
itors which have a large voltage coefficient (such as general-purpose ceramics) must be avoided since
these can degrade signal linearity. Any unused analog input pairs should be left unconnected.
5.5.1
Analog Input Configuration for 1 VRMS Input Levels
The CS5346 PGA, excluding the input multiplexer, is shown in Figure 10 with nominal component values.
Interfacing to this circuit is a relatively simple matter and several options are available. The simplest option
is shown in Figure 11. However, it may be advantageous in some applications to provide a low-pass filter
prior to the PGA to prevent radio frequency interference within the amplifier. The circuit shown in Figure 12
MUX
+32 dB
AIN1A
AIN2A
AIN3A
AIN4A/MICIN1
AIN5A
AIN6A
PGA
MUX
+32 dB
AIN1B
AIN2B
AIN3B
AIN4B/MICIN2
AIN5B
AIN6B
Analog Input
Selection Bits
Channel A
PGA Gain Bits
Channel B
PGA Gain Bits
Out to ADC
Channel A
Out to ADC
Channel B
PGA
Figure 9. Analog Input Architecture
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相关代理商/技术参数 |
参数描述 |
|---|---|
| CS5346-DQZR | 功能描述:音频数/模转换器 IC 103dB 24Bit 192kHz Stereo Audio ADC RoHS:否 制造商:Texas Instruments 转换器数量: 分辨率:16 bit 接口类型:I2S, UBS 转换速率: 信噪比:98 dB 工作电源电压:5 V DAC 输出端数量:2 工作温度范围:- 25 C to + 85 C 电源电流:23 mA 安装风格:SMD/SMT 封装 / 箱体:TQFP-32 封装:Reel |
| CS5349-000 | 制造商:TE Connectivity 功能描述:4110-10-340812 |
| CS5349-BP | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog-to-Digital Converter， 16-Bit |
| CS5349-BS | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog-to-Digital Converter， 16-Bit |
| CS5349-KP | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog-to-Digital Converter， 16-Bit |
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