参数资料
型号: CS5361-KSZ
厂商: Cirrus Logic Inc
文件页数: 16/23页
文件大小: 0K
描述: IC ADC AUD 114DB 204KHZ 24-SOIC
标准包装: 31
位数: 24
采样率(每秒): 204k
数据接口: 串行
转换器数目: 2
功率耗散(最大): 235mW
电压电源: 模拟和数字
工作温度: -10°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 24-SOIC(0.295",7.50mm 宽)
供应商设备封装: 24-SOIC
包装: 管件
输入数目和类型: 2 个差分,单极
产品目录页面: 755 (CN2011-ZH PDF)
配用: 598-1547-ND - BOARD EVAL FOR CS5361 STEREO ADC
其它名称: 598-1086-5
CS5361
DS467F2
23
7.0 REVISION HISTORY
Release
Date
Changes
PP3
Mar 2003
Preliminary datasheet.
PP4
Sept 2004
Include lead-free device ordering info.
F1
Jan 2005
Improve Gain Error specification under Analog Characteristics.
Specify Full-scale Input Voltage in terms of VA under Analog Characteristics.
Update Differential Input Impedance under Analog Characteristics.
Increase maximum THD+N rating for automotive grade devices.
Increase maximum Power-Supply Current, IA, under DC Electrical Characteristics.
Reduce maximum Power Consumption under DC Electrical Characteristics.
Update FILT+ Output Impedance specification under DC Electrical Characteristics.
Extend maximum Fs in Single-Speed Mode to 51 kHz.
Extend maximum Fs in Double-Speed Mode to 102 kHz.
Extend maximum Fs in Quad-Speed Mode to 204 kHz.
Decrease maximum SCLK falling to LRCK edge specification in Quad-Speed Mode.
Replace minimum MCLK high/low timing specifications with duty cycle specification.
Replace minimum SCLK high/low timing specifications with duty cycle specification.
F2
Feb 2005
Correct Recommended Analog Input Circuit.
Table 4. Revision History
Contacting Cirrus Logic Support
For all product questions and inquiries contact a Cirrus Logic Sales Representative.
To find one nearest you go to www.cirrus.com
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