参数资料
型号: CS5372-BSZR
厂商: Cirrus Logic Inc
文件页数: 6/22页
文件大小: 0K
描述: IC MODULATOR LP/HP 2CH 24-SSOP
标准包装: 1,000
类型: 调制器
分辨率(位): 24 b
采样率(每秒): 512k
电压电源: 模拟和数字,双 ±
电源电压: ±2.5V,3.3 V ~ 5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-SSOP(0.209",5.30mm 宽)
供应商设备封装: 24-SSOP
包装: 带卷 (TR)
配用: 598-1778-ND - EVALUATION BOARD FOR CS5376
CS5371 CS5372
14
DS255F3
achieved. During this time, the MFLAG pin transi-
tions from low to high to signal an error condition.
The analog input signal must be reduced to within
the full-scale range for at least 32 MCLK cycles for
the modulator to recover from an unstable condi-
tion.
The MFLAG output connects to a dedicated input
on the digital filter, causing an error bit to be set in
the status portion of the digital output data word
when detected.
8. POWER MODES
Four power modes are available when using the
CS5371/72 modulators.
Normal power and low
power modes are operational modes, power down
and micro-power modes are non-operational
standby modes.
8.1.
Normal Power Mode
The normal operational mode for the modulators,
LPWR=0 and MCLK=2.048 MHz, provides the
best performance with power consumption of
25 mW per channel. This power mode is recom-
mended when maximum conversion accuracy is
required.
8.2.
Low Power Mode - LPWR
The modulators have a low-power operational
mode, LPWR=1 and MCLK=1.024 MHz, that re-
duces power consumption to 15 mW per channel
at the expense of 3 dB of dynamic range. This op-
erational mode is recommended when minimizing
power is more important than maximizing dynamic
range.
When operated with LPWR=1, the modulator sam-
pling clock (MCLK / 4) must be restricted to rates
of 256 kHz or less, which requires MCLK to run at
1.024 MHz or less. Operating in low power mode
with modulator sample rates greater than 256 kHz
will significantly degrade total harmonic distortion
performance.
8.3.
Power Down Mode - PWDN
The modulators have a power down mode,
PWDN=1 and MCLK=Active, that disables the op-
eration of the selected modulator channel and re-
duces its power consumption to 1 mW.
Each
modulator has an independent power down pin,
PWDN on the CS5371 and PWDN1, PWDN2 on
the CS5372. Note that when the modulators are
powered down and MCLK is active, the internal
clock generator is still drawing minimal currents.
8.4.
Micro-power Mode
Standby power consumption of the modulators can
be minimized by placing them into a micro-power
mode, PWDN=1 and MCLK=0. Micro-power mode
requires setting the PWDN pin and halting MCLK
to remove the clock generator input current. Micro-
power mode consumes only 10
W of power.
9. POWER SUPPLY
The CS5371/72 modulators have one positive an-
alog power supply pin, VA+, one negative analog
power supply pin, VA-, one digital power supply
pin, VD, and one digital ground pin, DGND. The
analog and digital circuitry is separated internally
to enhance performance, therefore power must be
supplied to all three supply pins and the digital
ground pin must be connected to system ground.
9.1.
Power Supply Configurations
The CS5371/72 analog supplies can be powered
by a single +5 V supply and analog ground, or by
dual supplies of
± 2.5 V. When using dual sup-
plies, the positive and negative analog power sup-
plies must satisfy the following conditions:
(VA+) - (VA-) < 6.8 volts
(VD) - (VA-) < 7.6 volts
These conditions permit several power supply con-
figurations.
VA+ = +5V; VA- = 0V;
VD+ = +3.3V to +5V
VA+ = +2.5V;VA- = -2.5V; VD+ = +3.3V
When used with the CS5376A or CS5378 digital fil-
ter the maximum voltage differential between the
modulator digital supply, VD, and the CS5376A/78
I/O supply, VDD2 or VDDPAD, must be 0.3V or
less.
9.2.
Power Supply Bypassing
The analog and digital supply pins, VA+, VA-, and
VD, should be decoupled to system ground with
0.01
F and 10 F capacitors, or with a single
0.1
F capacitor. Bypass capacitors can be X7R,
tantalum, or any other dielectric types.
相关PDF资料
PDF描述
CS5372A-ISZ IC MODULATOR LP/HP 2CH 24-SSOP
CS5373A-ISZR IC DAC/MODULATOR LP/HP 28-SSOP
CS5376A-IQZ IC FILTER DGTL MULTI-CH 64-TQFP
CS61577-IL1Z IC LINE INTERFACE T1/E1 28PLCC
CS61584A-IQ3Z IC LINE INTERFACE T1/E1 64LQFP
相关代理商/技术参数
参数描述
CS5373A 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:Low-power, High-performance Modulator and Test DAC
CS5373A-IS 功能描述:模数转换器 - ADC IC Dlt-Sgm Modulator w/Intgrtd Tst DAC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32
CS5373A-ISR 功能描述:模数转换器 - ADC IC Dlt-Sgm Modulator w/Intgrtd Tst DAC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32
CS5373A-ISZ 功能描述:数模转换器- DAC IC Dlt-Sgm Modulatr w/Intgrtd Tst DAC RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube
CS5373A-ISZR 功能描述:模数转换器 - ADC IC Dlt-Sgm Modulator w/Intgrtd Tst DAC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32