参数资料
型号: CS5460A-BSZR
厂商: Cirrus Logic Inc
文件页数: 15/54页
文件大小: 0K
描述: IC ENERGY METERING 1PHASE 24SSOP
标准包装: 1,000
输入阻抗: 30 千欧
测量误差: 0.1%
电压 - 高输入/输出: 0.8V
电压 - 低输入/输出: 0.2V
电流 - 电源: 2.9mA
电源电压: 4.75 V ~ 5.25 V
测量仪表类型: 单相
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-SSOP(0.209",5.30mm 宽)
供应商设备封装: 24-SSOP
包装: 带卷 (TR)
配用: CDB5460AU-ND - EVALUATION BOARD FOR CS5460A
CS5460A
a 4.096 MHz clock at XIN, and K = 1, instanta-
neous A/D conversions for voltage, current, and
power are performed at a 4000 Sps rate, whereas
I RMS , V RMS , and energy calculations are per-
formed at a 1 Sps rate.
2.2.1 CS5460A Linearity Performance
Table 2 lists the range of input levels (as a percent-
age of full-scale) over which the (linearity + varia-
tion) of the results in the Vrms, Irms and Energy
Registers are guaranteed to be within ± 0.1 % of
reading after the completion of each successive
computation cycle. Note that until the CS5460A is
calibrated (see Calibration) the accuracy of the
CS5460A with respect to a reference line-voltage
and line-current level on the power mains is not
guaranteed to within ± 0.1%. After both channels of
the device are calibrated for offset/gain, the ±0.1%
of reading spec will also reflect accuracy of the
Vrms, Irms, and Energy Register results. Finally,
observe that the maximum (full-scale) differential
input voltage for the voltage channel (and current
channel, when its PGA is set for 10x gain) is
250 mV (nominal). If the gain registers of both
channels are set to 1 (default) and the two DC
offset registers are set to zero (default), then a
250mV DC signal applied to the voltage/current
inputs will measure at (or near) the maximum
value of 0.9999... in the RMS Current/Voltage
Registers. Remember that the RMS value of a
250 mV (DC) signal is also 250 mV. However, for
either input channel, it would not be practical to in-
ject a sinusoidal voltage with RMS value of
250 mV. This is because when the instantaneous
value of such a sine wave is at or near the level of
its positive/negative peak regions (over each cy-
cle), the voltage level of this signal would exceed
the maximum differential input voltage range of the
input channels. The largest sine wave voltage sig-
nal that can be presented across the inputs, with
no saturation of the inputs, is:
250 mV / sqrt(2) = ~176.78 mV (RMS),
which is ~70.7% of full-scale. This would imply that
for the current channel, the (linearity+variation) tol-
erance of the RMS measurements for a purely si-
nusoidal 60 Hz input signal could be measured to
within ± 0.1% of reading over a magnitude range of
0.2% - 70.7% of the maximum full-scale differen-
tial input voltage level.
The range over which the (linearity + variation) will
remain within ±0.1% can often be increased by se-
lecting a value for the Cycle-Count Register such
that the time duration of one computation cycle is
equal to (or very close to) a whole-number of pow-
er-line cycles (and N must be greater than or equal
to 4000). For example, with the cycle count set to
4200, the ±0.1% of reading (linearity + variation)
range for measurement of a 60 Hz sinusoidal cur-
rent-sense voltage signal can be increased beyond
the range of 0.2% - 70.7%. The accuracy range
will be increased because (4200 samples / 60 Hz)
is a whole number of cycles (70). Note that this in-
crease in the measurement range refers to an ex-
tension of the low end of the input scale (i.e., this
does not extend the high-end of the range above
100% of full-scale). This enables accurate mea-
surement of even smaller power-line current lev-
els, thereby extending the load range over which
the power meter can make accurate energy mea-
surements. Increasing the accuracy range can be
beneficial for power metering applications which
require accurate power metering over a very large
load range.
Energy
Vrms
Irms
2.2.2 Single Computation Cycle (C=0)
Range (% of FS)
Max. Differential
Input
Linearity
0.1% - 100%
not applicable
0.1% of
reading
50% - 100%
V-channel:
±250 mV
0.1% of
reading
0.2% - 100%
I-channel:
±250 mV 10x
±50 mV
50x
0.1% of
reading
Note that ‘C’ refers to the value of the C bit, con-
tained in the ‘Start Conversions’ command (see
Section 4.1). This commands instructs the
CS5460A to perform conversions in ‘single compu-
tation cycle’ data acquisition mode. Based on the
value in the Cycle Count Register, a single compu-
Table 2. Available range of ±0.1% output linearity, with
default settings in the gain/offset registers.
DS487F5
tation cycle is performed after a ‘Start Conversions’
command is sent to the serial interface. After the
computations are complete, DRDY is set. 32
SCLKs are then needed to read out a calculation
15
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