参数资料
型号: CS5464-IS
厂商: Cirrus Logic Inc
文件页数: 16/46页
文件大小: 0K
描述: IC PWR/ENERGY METER 3CH 28-SSOP
标准包装: 47
输入阻抗: 30 千欧
测量误差: 0.1%
电压 - 高输入/输出: 0.8V
电压 - 低输入/输出: 0.2V
电流 - 电源: 3.5mA
电源电压: 4.75 V ~ 5.25 V
测量仪表类型: 单相
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-SSOP(0.209",5.30mm 宽)
供应商设备封装: 28-SSOP
包装: 管件
配用: 598-1554-ND - BOARD EVAL FOR CS5464 ADC
其它名称: 598-1193-5
CS5464
V1 ACOFF
(V2 ACOFF )
P1 OFF (P2 OFF )
I1 ACOFF
(I2 ACOFF )
Figure 5. Low-rate Calculations
P ACTIVE
4.8 Power and Energy Results
The instantaneous voltage and current samples are
multiplied to obtain the instantaneous power ( P1 , P2 )
(see Figure 3 and 4 ). The product is then averaged over
N conversions to compute active power ( P1 AVG ,
P2 AVG ).
Apparent power ( S1 , S2 ) is the product of RMS voltage
and current as shown:
S = V RMS ? I RMS
Power factor ( PF1 , PF2 ) is active power divided by ap-
parent power as shown below. The sign of the power
factor is determined by the active power.
PF = ----------------------
S
Wideband reactive power ( Q1 WB , Q2 WB ) is calculated
by doing a vector subtraction of active power from ap-
parent power.
ed to line frequency, so their gain is corrected by the Ep-
silon register, which is based on line frequency.
Reactive power ( Q1 AVG , Q2 AVG ) is generated by inte-
grating the instantaneous quadrature power over N
samples.
4.9 Peak Voltage and Current
Peak current ( I1 PEAK , I2 PEAK ) and peak voltage
( V1 PEAK , V2 PEAK ) are the largest current and voltage
samples detected in the previous low-rate interval.
4.10 Power Offset
The power offset registers, P1 OFF ( P2 OFF ) can be used
to offset erroneous power sources resident in the sys-
tem not originating from the power line. Residual power
offsets are usually caused by crosstalk into current
paths from voltage paths or from ripple on the meter or
chip’s power supply, or from inductance from a nearby
transformer.
These offsets can be either positive or negative, indicat-
ing crosstalk coupling either in phase or out of phase
S 2 – P ACTIVE
Q WB =
2
with the applied voltage input. The power offset regis-
ters can compensate for either condition.
Quadrature power ( Q1 , Q2 ) are sample rate results ob-
tained by multiplying instantaneous current ( I1 , I2 ) by in-
stantaneous quadrature voltage ( V1Q , V2Q ) which are
created by phase shifting instantaneous voltage ( V1 ,
V2 ) 90 degrees using first-order integrators. (see Figure
3 and 4 ). The gain of these integrators is inversely relat-
16
To use this feature, measure the average power at no
load using either Single or Continuous Conversion com-
mands. Take the measured result (from the P1 AVG
( P2 AVG ) register), invert (negate) the value and write it
to the associated power offset register, P1 OFF ( P2 OFF ).
DS682F3
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