参数资料
型号: CS5467-ISZR
厂商: Cirrus Logic Inc
文件页数: 6/46页
文件大小: 0K
描述: IC ENERGY METERING 1PHASE 28SSOP
标准包装: 1,000
输入阻抗: 30 千欧
测量误差: 0.1%
电压 - 高输入/输出: 0.8V
电压 - 低输入/输出: 0.2V
电流 - 电源: 3.5mA
电源电压: 4.75 V ~ 5.25 V
测量仪表类型: 单相
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-SSOP(0.209",5.30mm 宽)
供应商设备封装: 28-SSOP
包装: 带卷 (TR)
配用: 598-1555-ND - BOARD EVAL FOR CS5467 ADC
CS5467
2. PIN DESCRIPTION
Crystal Out
CPU Clock Output
Positive Digital Supply
Digital Ground
Serial Clock
Serial Data Ouput
Chip Select
Mode Select
Differential Voltage Input
Differential Voltage Input
Voltage Reference Output
Voltage Reference Input
Differential Voltage Input
Differential Voltage Input
XOUT
CPUCLK
VD+
DGND
SCLK
SDO
CS
MODE
VIN1+
VIN1-
VREFOUT
VREFIN
VIN2+
VIN2-
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
XIN
SDI
E2
E1
INT
RESET
E3
PFMON
IIN1+
IIN1-
VA+
AGND
IIN2+
IIN2-
Crystal In
Serial Data Input
Energy Output 2
Energy Output 1
Interrupt
Reset
Energy Output 3
Power Fail Monitor
Differential Current Input
Differential Current Input
Positive Analog Supply
Analog Ground
Differential Current Input
Differential Current Input
Clock Generator
Crystal Out
Crystal In
CPU Clock Output
Control Pins and Serial Data I/O
Serial Clock
Serial Data Output
Chip Select
Mode Select
1,28
2
5
6
7
8
XOUT, XIN — Connect to an external quartz crystal. Alternatively, an external clock can be sup-
plied to the XIN pin to provide the system clock for the device.
CPUCLK — Logic-level output from crystal oscillator. Can be used to clock an external CPU.
SCLK — Clocks serial data from the SDI pin and to the SDO pin when CS is low. SCLK is a
Schmitt-trigger input when MODE is low and a driven output when MODE is high.
SDO — Serial data output. Data is clocked out by SCLK.
CS — An input that enables the serial interface when MODE is low and a driven output when
MODE is high.
MODE — High selects external E 2 PROM, Low selects external microcontroller. MODE includes a
weak internal pull-down and therefore selects microcontroller mode if not connected.
Energy Output
22, 25, E3, E1, E2 — Primarily active-low energy pulse outputs. These can be programmed to output
26 other conditions.
Reset
Interrupt
Serial Data Input
Analog Inputs/Outputs
Differential Voltage Inputs
Differential Current Inputs
Voltage Reference Output
Voltage Reference Input
Power Supply Connections
Positive Digital Supply
Digital Ground
Positive Analog Supply
Analog Ground
Power Fail Monitor
6
23
24
27
9,10
13, 14
20,19,
16,15
11
12
3
4
18
17
21
RESET — An active-low Schmitt-trigger input used to reset the chip.
INT — Active-low output, indicates that an enabled condition has occurred.
SDI — Serial data input. Data is clocked in by SCLK.
VIN1+, VIN1-, VIN2+, VIN2- — Differential analog inputs for the voltage channels.
IIN1+, IIN1-, IIN2+, IIN2- — Differential analog inputs for the current channels.
VREFOUT — The on-chip voltage reference output. Nominally 2.5 V, referenced to AGND.
VREFIN — The voltage reference input. Can be connected to VREFOUT or external 2.5 V refer-
ence.
VD + — The positive digital supply.
DGND — Digital ground.
VA+ — The positive analog supply.
AGND — Analog ground.
PFMON — Used to monitor the unregulated power supply via a resistive divider. If the PFMON
voltage drops below its low limit, the low-supply detect (LSD) bit is set in the Status register.
DS714F3
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