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参数资料
型号： CS5524-ASZR
厂商： Cirrus Logic Inc
文件页数： 34/56页
文件大小： 0K
描述： IC ADC 24BIT 4CH 24-SSOP
标准包装： 1,000
位数： 24
数据接口： 串行
转换器数目： 1
功率耗散（最大）： 14.8mW
电压电源： 模拟和数字
工作温度： -40°C ~ 85°C
安装类型： 表面贴装
封装/外壳： 24-SSOP（0.209"，5.30mm 宽）
供应商设备封装： 24-SSOP
包装： 带卷 (TR)
输入数目和类型： 4 个差分，单极；4 个差分，双极
配用： 598-1012-ND - EVAL BOARD FOR CS5524 ADC
CS5521/22/23/24/28
4
DS317F8
LIST OF FIGURES
Figure 1. Continuous Running SCLK Timing (Not to Scale) ......................................................... 12
Figure 2. SDI Write Timing (Not to Scale) ..................................................................................... 12
Figure 3. SDO Read Timing (Not to Scale) ................................................................................... 12
Figure 4. Multiplexer Configurations.............................................................................................. 13
Figure 5. Input Models for AIN+ and AIN- pins,
≤100 mV Input Ranges....................................... 14
Figure 6. Input Models for AIN+ and AIN- pins, >100 mV input ranges ........................................ 14
Figure 7. Input Ranges Greater than 5 V ...................................................................................... 16
Figure 8. Input Model for VREF+ and VREF- Pins........................................................................ 16
Figure 9. CS5523/24 Register Diagram ........................................................................................ 17
Figure 10. Command and Data Word Timing................................................................................ 25
Figure 11. Self Calibration of Offset (Low Ranges)....................................................................... 32
Figure 12. Self Calibration of Offset (High Ranges) ...................................................................... 32
Figure 13. Self Calibration of Gain (All Ranges) ........................................................................... 32
Figure 14. System Calibration of Offset (Low Ranges) ................................................................. 32
Figure 15. System Calibration of Offset (High Ranges) ................................................................ 33
Figure 16. System Calibration of Gain (Low Ranges) ................................................................... 33
Figure 17. System Calibration of Gain (High Ranges) .................................................................. 33
Figure 18. Filter Response (Normalized to Output Word Rate = 15 Sps) ..................................... 42
Figure 19. Typical Linearity Error for CS5521/23 .......................................................................... 42
Figure 20. Typical Linearity Error for CS5522/24/28 ..................................................................... 42
Figure 21. CS5522 Configured to use on-chip charge pump to supply NBV ................................ 43
Figure 22. CS5522 Configured for ground-referenced Unipolar Signals....................................... 44
Figure 23. CS5522 Configured for Single Supply Bridge Measurement ....................................... 44
Figure 24. Charge Pump Drive Circuit for VD+ = 3 V.................................................................... 45
Figure 25. Alternate NBV Circuits ................................................................................................. 45
LIST OF TABLES
Table 1. Relationship between Full Scale Input, Gain Factors, and Internal Analog
Signal Limitations ............................................................................................................. 15
Table 2. Command Register Quick Reference.............................................................................. 19
Table 3. Channel-Setup Registers ................................................................................................27
Table 4. Configuration Register..................................................................................................... 30
Table 5. Offset and Gain Registers ............................................................................................... 31
Table 6. Output Coding for 16-bit CS5521/23 and 24-bit CS5522/24/28 ...................................... 40
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