参数资料
| 型号： | CS5529-ASZR |
| 厂商： | Cirrus Logic Inc |
| 文件页数： | 3/31页 |
| 文件大小： | 0K |
| 描述： | IC ADC 16BIT W/6BIT LATCH 20SSOP |
| 标准包装： | 1,000 |
| 位数： | 16 |
| 数据接口： | 串行 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 3.5mW |
| 电压电源： | 双 ± |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-SSOP（0.209"，5.30mm 宽） |
| 供应商设备封装： | 20-SSOP |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 1 个差分，单极；1 个差分，双极 |
| 配用： | 598-1015-ND - EVAL BOARD FOR CS5529 |
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CS5529
DS246F5
11
ages. The differential voltage between VREF+ and
VREF- sets the nominal full scale input span of the
converter. For a single-ended reference voltage,
such as the LT1019-2.5, the reference output is
connected to the VREF+ pin of the CS5529 and the
ground reference for the LT1019-2.5 is connected
to the VREF- pin.
Serial Port
The CS5529 includes a microcontroller with a
command register, a configuration register, a con-
version data register (read only), and a gain and off-
set register for calibration. All registers, except the
8-bit command register, are 24-bits in length. Fig-
ure 3 illustrates a block diagram of all the internal
register.
After a system initialization or reset, the serial port
is set to the command mode. The converter stays in
this mode until a valid 8-bit command is received
(the first 8-bits into the serial port). Once a valid 8-
bit command is received and interpreted by the
ADC’s command register, the serial port enters the
data mode. In data mode the next 24 serial clock
pulses shift data either into or out of the serial port
(72 serial clock pulses are needed if the setup reg-
ister command is issued). The Command Register
Descriptions section illustrates all valid com-
mands.
AIN
C = 20pF
f = 32.768 kHz
φ Coarse
1
φ Fine
1
V
≤ 25mV
i = fV
C
os
n
Figure 1. Input models for AIN+ and AIN- pins.
VREF
C = 10pF
f = 32.768 kHz
2
φ Fine
1
V
≤ 25mV
i = fV
C
os
n
φ Coarse
Figure 2. Input model for VREF+ and VREF- pins.
Latch Outputs
Low Power Mode
Output Word Rates
Unipolar/Bipolar
Reset System
etc.
Configuration Register (1 × 24)
Serial
Interface
CS
SDI
SDO
SCLK
Command Register (1 × 8)
Wr
it
e
O
n
ly
Re
a
d
O
n
ly
Conversion Data Register (1x24)
Gain Register (1 × 24)
Offset Register (1 × 24)
Figure 3. CS5529 Register Diagram.
相关PDF资料 |
PDF描述 |
|---|---|
| CS5530-ISZR | IC ADC 24BIT 1CH W/LNA 20-SSOP |
| CS5534-ASZR | IC ADC 24BIT 4CH W/LNA 24-SSOP |
| CS5534-BSZR | IC ADC 24BIT 4CH W/LNA 24SSOP |
| CS5550-ISZR | IC ADC 2CH LOW-COST 24-SSOP |
| CS5565-ISZ | IC ADC DELTA-SIGMA 24BIT 24-SSOP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| CS5530 | 制造商:Texas Instruments 功能描述: |
| CS5530_0911 | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:24-bit ADC with Ultra-low-noise Amplifier |
| CS5530A | 制造商:AMD 制造商全称:Advanced Micro Devices 功能描述:AMD Geode CS5530A Companion Device |
| CS5530A-UCE | 制造商:AMD 制造商全称:Advanced Micro Devices 功能描述:AMD Geode CS5530A Companion Device |
| CS5530A-UCE B1 | 制造商:Advanced Micro Devices 功能描述:DICCX5530 |
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