参数资料
型号: CS5550-ISZR
厂商: Cirrus Logic Inc
文件页数: 11/15页
文件大小: 0K
描述: IC ADC 2CH LOW-COST 24-SSOP
标准包装: 1,000
位数: 24
采样率(每秒): 4k
数据接口: 串行
转换器数目: 2
功率耗散(最大): 30mW
电压电源: 模拟和数字
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-SSOP(0.209",5.30mm 宽)
供应商设备封装: 24-SSOP
包装: 带卷 (TR)
输入数目和类型: 2 个差分,双极
CS5550
DS630F1
5
2. CHARACTERISTICS/SPECIFICATIONS
Min / Max characteristics and specifications are guaranteed over all Operating Conditions.
Typical characteristics and specifications are measured at nominal supply voltages and TA = 25°C.
DGND = 0 V. All voltages with respect to 0 V.
ANALOG CHARACTERISTICS
Notes: 1. Applies after system calibration
2. Effective Input Impedance (EII) is determined by clock frequency (DCLK) and Input Capacitance (IC).
EII = 1/(IC*DCLK/4). Note that DCLK = MCLK / K.
Parameter
Symbol
Min
Typ
Max
Unit
Accuracy (Both Channels)
Common Mode Rejection
(DC, 50, 60 Hz)
CMRR
80
-
dB
Offset Drift
-
5
-
nV/°C
Analog Inputs (AIN1
±)
Differential Input Voltage Range
(Gain = 10)
{(AIN1+) - (AIN1-)}
(Gain = 50)
AIN1
0
-
500
100
mVP-P
Total Harmonic Distortion
THD1
80
-
dB
Common Mode + Signal
Both Gain Ranges
-0.25
-
VA+
V
Crosstalk with AIN2± at Full Scale
(50, 60 Hz)
-
-115
dB
Input Capacitance
(Gain = 10)
(Gain = 50)
IC1
-
25
-
pF
Effective Input Impedance
(Gain = 10)
(Note 2)
(Gain = 50)
EII1
30
-
k
k
Noise (Referred to Input)
(Gain = 10)
(Gain = 50)
N1
-
22.5
4.5
Vrms
Accuracy
Bipolar Offset Error
(Note 1)
VOS
-
±0.001
%F.S.
Full-Scale Error
(Note 1)
FSE
-
±0.001
%F.S.
Analog Inputs (AIN2
±)
Differential Input Voltage Range
{(AIN2+) - (AIN2-)}
AIN2
0-
500
mVP-P
Total Harmonic Distortion
THD2
65
-
dB
Common Mode + Signal
-0.25
-
VA+
V
Crosstalk with AIN1± at Full Scale
(50, 60 Hz)
-
-70
dB
Input Capacitance
(Gain = 10)
IC2
-0.2
-
pF
Effective Input Impedance (Note 2)
(Gain = 10)
EII2
5-
-
M
Noise (Referred to Input)
(Gain = 10)
N2
--
150
Vrms
Accuracy
Bipolar Offset Error
(Note 1)
VOS
-
±0.01
%F.S.
Full-Scale Error
(Note 1)
FSE
-
±0.01
%F.S.
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