参数资料
| 型号： | CS5550-ISZR |
| 厂商： | Cirrus Logic Inc |
| 文件页数： | 14/15页 |
| 文件大小： | 0K |
| 描述： | IC ADC 2CH LOW-COST 24-SSOP |
| 标准包装： | 1,000 |
| 位数： | 24 |
| 采样率（每秒）： | 4k |
| 数据接口： | 串行 |
| 转换器数目： | 2 |
| 功率耗散（最大）： | 30mW |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SSOP（0.209"，5.30mm 宽） |
| 供应商设备封装： | 24-SSOP |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 2 个差分，双极 |
IDT / ICS HSTL FREQUENCY SYNTHESIZER
8
ICS8421002I REV B MARCH 02, 2009
ICS8421002I
FEMTOCLOCKS CRYSTAL-TO-HSTL FREQUENCY SYNTHESIZER
CRYSTAL INPUT INTERFACE
The ICS8421002I has been characterized with 18pF parallel
resonant crystals. The capacitor values shown in
Figure 2 below
Figure 2. CRYSTAL INPUt INTERFACE
were determined using a 26.5625MHz 18pF parallel resonant
crystal and were chosen to minimize the ppm error.
APPLICATION INFORMATION
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. The ICS8421002I provides
separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. V
DD, VDDA, and VDDO
should be individually connected to the power supply
plane through vias, and bypass capacitors should be
used for each pin. To achieve optimum jitter performance, power
supply isolation is required.
Figure 1 illustrates how
a 10
resistor along with a 10F and a .01F bypass
capacitor should be connected to each V
DDA.
POWER SUPPLY FILTERING TECHNIQUES
FIGURE 1. POWER SUPPLY FILTERING
10
V
DDA
10
F
.01
F
3.3V or 2.5V
.01
F
V
DD
C1
22p
X1
18pF Parallel Crystal
C2
22p
XTAL_OUT
XTAL_IN
INPUTS:
CRYSTAL INPUT:
For applications not requiring the use of the crystal oscillator input,
both XTAL_IN and XTAL_OUT can be left floating. Though not
required, but for additional protection, a 1k
resistor can be tied
from XTAL_IN to ground.
REF_CLK INPUT:
For applications not requiring the use of the reference clock,
it can be left floating. Though not required, but for additional
protection, a 1k
resistor can be tied from the REF_CLK to
ground.
LVCMOS CONTROL PINS:
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1k
resistor can be used.
RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS
OUTPUTS:
HSTL OUTPUT
All unused HSTL outputs can be left floating. We recommend
that there is no trace attached. Both sides of the differential output
pair should either be left floating or terminated.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| CS5-56 | 制造商:SUPERWORLD 制造商全称:Superworld Electronics 功能描述:POWER TRANSFORMER |
| CS5560 | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:【2.5 V / 5 V, 50 kSps, 24-bit, High-throughput ツヒ ADC |
| CS5560_08 | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:±2.5 V / 5 V, 50 kSps, 24-bit, High-throughput ΔΣ ADC |
| CS5560_09 | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:±2.5 V / 5 V, 50 kSps, 24-bit, High-throughput ΔΣ ADC |
| CS5560-ISZ | 功能描述:模数转换器 - ADC 24-Bit 50 kSps ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
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