参数资料
型号: CS7654-KQ
厂商: CIRRUS LOGIC INC
元件分类: 消费家电
英文描述: CCD COLOR SPACE PROCESSOR WITH ANALOG OUTPUT
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP64
封装: 10 X 10 X 1.40 MM, TQFP-64
文件页数: 25/62页
文件大小: 1028K
代理商: CS7654-KQ
CS7654
25
INTERNAL REGISTER STRUCTURE
AND USER INTERFACE
The user interface describes the user’s external
view of the CS7654 and the basic control opera-
tions. These areas include digital data, analog out-
put modes and organization, timing and
synchronization signals, I
2
C interface, and miscel-
laneous controls.
The CS7654 has two I
2
C ports: (1) a slave I
2
C port
called the primary I
2
C port, and (2) a secondary I
2
C
port with limited I
2
C master capabilities. The pri-
mary I
2
C port allows an external controller to con-
trol the CS7654 ( See Station Address section for
more details on Station Address structure ). It is as-
sumed the external controller will also directly con-
trol any other I
2
C slave devices on the camera
board. This is the normal I
2
C operation mode of
CS7654. The secondary I
2
C port, on the other
hand, may be used to control all the other slave de-
vices on a camera board through the CS7654 only.
This feature is useful when the external I
2
C con-
troller is used to control multiple cameras. When
used in this configuration the P4BYTMODE pin
(pin 46) of the CS7654 must be tied high and the
device is operated in four-byte mode.
Operating CS7654 in Normal I
2
C
Configuration (Three-Byte Mode)
In normal mode, the CS7654 is connected as a
slave device to an external I
2
C controller through
the primary I
2
C port. The connection is done via a
two-wire serial bus. Other I
2
C devices on the cam-
era may also share the same serial bus. The external
controller communicates with the I
2
C devices by
sending and receiving short packets of 8-bit words
in accordance with the I
2
C protocol. The packets
contain the station address of the target device, the
desired register address, and data.
There are three packet formats: WRITE format,
ADDRESS SET format, and READ format. Each
packet is addressed to a device by the station ad-
dress. The LSB of the station address is the R/W
(data direction) bit. This bit is set LOW in the
WRITE and ADDRESS SET packets, and it is set
HIGH for READ packets. The master can read and
write to non-existent registers within the selected
device. WRITE operations will have no effect;
READ operations will return a value of 00h.
Station Address
Each device on the I
2
C bus has a unique 7-bit ad-
dress. An eighth bit, the R/W bit, determines if the
current data transfer writes data to the slave device
or reads data from the slave device. It is common to
represent the station address and R/W bit as two 8-
bit station addresses, one address for write accesses
and another address for read accesses. We will fol-
low this practice. Please note that because the reg-
ister of the CS7654 are physically implemented in
two different banks, the use of two different Station
Addresses are necessary. Therefore, to access the
proper registers you must first select the proper Sta-
tion Address. Both Station Adresses have to be dif-
ferent from one another or an internal register
conflict will occur.
The CS7654 default station address are 34h for
writes and 35h for reads for the color processing
section and 00h and 01h for the encoder portion of
the CS7654. The station address can be changed by
writing a new station address to register FFh. The
value written to this register does not include the
R/W bit. For example. The default station address
(34h write / 35h read) will be stored as 1Ah in reg-
ister FFh.
Write Operations in Three-Byte Mode
The WRITE format consists of a three-byte packet.
The first byte is the station address with the data di-
rection bit set LOW to indicate a write. The second
byte is the device register address (0..255). The
third byte is the register data (0..255). No addition-
al bytes are allowed.
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