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参数资料
| 型号： | CSIX-PI40-O4-N1 |
| 厂商： | Lattice Semiconductor Corporation |
| 文件页数： | 7/23页 |
| 文件大小： | 0K |
| 描述： | INTERFACE IP CSIX TO PI40 ORCA 4 |
| 标准包装： | 1 |
| 系列： | * |
| 其它名称： | CSIXPI40O4N1 |
Lattice Semiconductor
Figure 3. PI40 Ingress Cell Structure (FIPI)
CSIX-to-PI40 IP Core User’s Guide
PI40 Byte
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
RES
EBP
TRCLASS[2:0]
1
2
3
MC
PSW_ID
RQN[3:0]
MCTAG[15:10]/DESTP[5:0]
RQN[9:4]
MCTAG[19:16]/DESTP[9:6]
MCTAG[9:8]/RQN3ST[9:8]
4
5
6
7
8
9
10
11
12
13
14
15
16
17 to (N+16)
N+17
N+18
(N+19) to
74, 82 or 90
75, 83 or 91
MCTAG[7:0]/ RQN3ST[7:0]
RES
RES
RES
RES
RES
RES
CSIX Base Header
CSIX Base Header
CSIX Extension Header
CSIX Extension Header
CSIX Extension Header
CSIX Extension Header
CSIX Payload (N bytes, where N ≤ MAX_FRAME_PAYLOAD_SIZE)
CSIX Vertical Parity
CSIX Vertical Parity
Remaining PI40 Payload (pad if needed)
BIP8
Cframe-to-PI40 Cell Conversion
Three types of Cframes are supported:
?
?
?
Idle
Unicast
Multicast ID
These Cframe types are shown in Figures 4, 5 and 6. For Unicast and Multicast ID Cframes, the entire Cframe is
mapped to the PI40 cell payload intact and Cframe base and extension header information is processed and
mapped to corresponding PI40 header data. After mapping the Cframe to the ?xed-length payload, pad is added to
?ll any unused locations.
Ingress Idle Cframes are dropped by the CSIX-L1 core. The IFI generates PI40 idle cells when no valid data cells
are available. These cells contain no user data, but do contain port egress direction backpressure information.
Figure 4. CSIX Unicast Cframe
CSIX Byte
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
DReady
CReady
Type
CR
P
1
2
3
Payload Length
Vertical Parity
Vertical Parity
7
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