参数资料
型号: CY2213ZC-2T
厂商: CYPRESS SEMICONDUCTOR CORP
元件分类: XO, clock
英文描述: High-Frequency Programmable PECL Clock Generator
中文描述: 500 MHz, OTHER CLOCK GENERATOR, PDSO16
封装: 4.40 MM, TSSOP-16
文件页数: 8/10页
文件大小: 103K
代理商: CY2213ZC-2T
CY2213
Document #: 38-07263 Rev. *E
Page 8 of 10
Figure 12
shows the definition of cycle-to-cycle duty cycle
error. Cycle-to-cycle duty cycle error is defined as the
difference between high-times of adjacent cycles over many
cycles (typically 12800 cycles at 400 MHz). Equal require-
ments apply to the low-times. t
DC
,
ERR
is defined as the clock
output cycle-to-cycle duty cycle error.
CLK
Figure 13
shows the definition of long-term jitter error.
Long-term jitter is defined as the accumulated timing error over
many cycles (typically 12800 cycles at 400 MHz). It applies to
both rising and falling edges. t
JLT
is defined as the long-term
jitter.
t
CYCLE
t
JP
= t
CYCLE,max
– t
CYCLE, min. over many cycles
CLKB
Figure 10. Period Jitter
t
CYCLE,i
t
JC
= t
CYLCE,i
– t
CYCLE,i+1 over many consecutive cycles
CLK
CLKB
t
CYCLE, i+1
Figure 11. Cycle-to-cycle Jitter
tPW+,i
t
DC,ERR
= t
PW+,i
– t
PW+,i+1
over many consecutive cycles
CLK
CLKB
tPW+,i+1
tCYCLE,i+1
tCYCLE, i+1
Cycle i
Cycle i+1
Figure 12. Cycle-to-cycle Duty Cycle Error
t
JLT
= t
max
– t
min over many cycles
CLK
CLKB
t
min
t
max
Figure 13. Long-term Jitter
相关PDF资料
PDF描述
CY2213 High-Frequency Programmable PECL Clock Generator(高频可编程PECL时钟发生器)
CY22150FC One-PLL General-Purpose Flash-Programmable and 2-Wire Serially Programmable Clock Generator
CY22150FI One-PLL General-Purpose Flash-Programmable and 2-Wire Serially Programmable Clock Generator
CY22150ZC One-PLL General-Purpose Flash-Programmable and 2-Wire Serially Programmable Clock Generator
CY22150ZI One-PLL General-Purpose Flash-Programmable and 2-Wire Serially Programmable Clock Generator
相关代理商/技术参数
参数描述
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