参数资料
型号: CY2308SI-2
厂商: CYPRESS SEMICONDUCTOR CORP
元件分类: 时钟及定时
英文描述: 3.3V Zero Delay Buffer
中文描述: 2308 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
封装: 0.150 INCH, MS-012, SOIC-16
文件页数: 16/17页
文件大小: 503K
代理商: CY2308SI-2
CY2308
Document Number: 38-07146 Rev. *L
Page 8 of 17
t3
Rise time[16, 17]
(–1H, –5H)
Measured between 0.8 V and
2.0 V, 30 pF load
1.50
ns
t4
Fall time[16, 17]
(–1, –2, –3, –4)
Measured between 0.8 V and
2.0 V, 30 pF load
2.50
ns
t4
Fall time[16, 17]
(–1, –2, –3, –4)
Measured between 0.8 V and
2.0 V, 15 pF load
1.50
ns
t4
Fall time[16, 17]
(–1H, –5H)
Measured between 0.8 V and
2.0 V, 30 pF load
1.25
ns
t5
Output to output skew on same
Bank (–1, –2, –3, –4)[16, 17]
All outputs equally loaded
200
ps
Output to output skew
(–1H, –5H)
All outputs equally loaded
200
ps
Output Bank A to output
Bank B skew (–1, –4, –5H)
All outputs equally loaded
200
ps
Output Bank A to output
Bank B skew (–2, –3)
All outputs equally loaded
400
ps
t6
Delay, REF rising edge to
FBK rising edge[16, 17]
Measured at VDD/2
0
250
ps
t7
Device to device skew[16, 17] Measured at VDD/2 on the FBK
pins of devices
–0
700
ps
t8
Output slew rate[16, 17]
Measured between 0.8 V and
2.0 V on –1H, –5H device using
Test Circuit 2
1–
V/ns
tJ
Cycle to cycle Jitter[16, 17]
(–1, –1H, –4, –5H)
Measured at 66.67 MHz, loaded
outputs, 15 pF load
–75
200
ps
Measured at 66.67 MHz, loaded
outputs, 30 pF load
––
200
ps
Measured at 133.3 MHz, loaded
outputs, 15 pF load
––
100
ps
tJ
Cycle to cycle Jitter[16, 17]
(–2, –3)
Measured at 66.67 MHz, loaded
outputs, 30 pF load
––
400
ps
Measured at 66.67 MHz, loaded
outputs, 15 pF load
––
400
ps
tLOCK
PLL lock time[16, 17]
Stable power supply, valid clocks
presented on REF and FBK pins
––
1.0
ms
Switching Characteristics for Industrial Temperature Devices (continued)
Parameter[15]
Name
Test Conditions
Min
Typ
Max
Unit
Notes
16. Parameter is guaranteed by design and characterization. Not 100% tested in production.
17. All parameters are specified with loaded outputs.
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相关代理商/技术参数
参数描述
CY2308SI-2[19] 制造商:CYPRESS 制造商全称:Cypress Semiconductor 功能描述:3.3 V Zero Delay Buffer
CY2308SI-2T 制造商:Cypress Semiconductor 功能描述:Zero Delay PLL Clock Driver Single 10MHz to 133MHz 16-Pin SOIC T/R
CY2308SI-2T[19] 制造商:CYPRESS 制造商全称:Cypress Semiconductor 功能描述:3.3 V Zero Delay Buffer
CY2308SI-3 功能描述:IC CLK ZDB 8OUT 133MHZ 16SOIC RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器,PLL,频率合成器 系列:- 产品变化通告:Product Discontinuation 04/May/2011 标准包装:96 系列:- 类型:时钟倍频器,零延迟缓冲器 PLL:带旁路 输入:LVTTL 输出:LVTTL 电路数:1 比率 - 输入:输出:1:8 差分 - 输入:输出:无/无 频率 - 最大:133.3MHz 除法器/乘法器:是/无 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:16-TSSOP(0.173",4.40mm 宽) 供应商设备封装:16-TSSOP 包装:管件 其它名称:23S08-5HPGG
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