- 您现在的位置：买卖IC网 > PDF目录9003 > CY28409OC (Silicon Laboratories Inc)IC CLOCK CK409GRANTSDALE 56TSSOP PDF资料下载
参数资料
| 型号： | CY28409OC |
| 厂商： | Silicon Laboratories Inc |
| 文件页数： | 15/16页 |
| 文件大小： | 0K |
| 描述： | IC CLOCK CK409GRANTSDALE 56TSSOP |
| 标准包装： | 26 |
| 类型： | * |
| PLL： | 是 |
| 输入： | 晶体 |
| 输出： | 时钟 |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:21 |
| 差分 - 输入:输出： | 无/是 |
| 频率 - 最大： | 400MHz |
| 除法器/乘法器： | 是/无 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | * |
| 封装/外壳： | * |
| 供应商设备封装： | * |
| 包装： | * |
CY28409
........................Document #: 38-07445 Rev. *D Page 8 of 16
Calculating Load Capacitors
In addition to the standard external trim capacitors, trace
capacitance and pin capacitance must also be considered to
correctly calculate crystal loading. As mentioned previously,
the capacitance on each side of the crystal is in series with the
crystal. This means the total capacitance on each side of the
crystal must be twice the specified crystal load capacitance
(CL). While the capacitance on each side of the crystal is in
series with the crystal, trim capacitors (Ce1,Ce2) should be
calculated to provide equal capacitive loading on both sides.
Use the following formulas to calculate the trim capacitor
values for Ce1 and Ce2.
CL....................................................Crystal load capacitance
CLe......................................... Actual loading seen by crystal
using standard value trim capacitors
Ce..................................................... External trim capacitors
Cs .............................................. Stray capacitance (terraced)
Ci ...........................................................Internal capacitance
(lead frame, bond wires etc.)
PD# (Power-down) Clarification
The PD# (Power-down) pin is used to shut off ALL clocks prior
to shutting off power to the device. PD# is an asynchronous
active LOW input. This signal is synchronized internally to the
device powering down the clock synthesizer. PD# is an
asynchronous function for powering up the system. When PD#
is LOW, all clocks are driven to a LOW value and held there
and the VCO and PLLs are also powered down. All clocks are
shut down in a synchronous manner so as not to cause
glitches while changing to the low ‘stopped’ state.
PD# Assertion
When PD# is sampled LOW by two consecutive rising edges
of the CPUC clock then all clock outputs (except CPU) clocks
must be held LOW on their next HIGH-to-LOW transition. CPU
clocks must be held with CPU clock pin driven HIGH with a
value of 2 x Iref and CPUC undriven. Due to the state of
internal logic, stopping and holding the REF clock outputs in
the LOW state may require more than one clock cycle to
complete
XTAL
Ce 2
Ce 1
Cs 1
Cs 2
X1
X2
Ci1
Ci2
Clo c k Ch ip
( C Y 28409)
Tr a c e
2. 8 p F
Tr im
33pF
Pin
3 t o 6p
Figure 2. Crystal Loading Example
Load Capacitance (each side)
Total Capacitance (as seen by the crystal)
Ce = 2 * CL – (Cs + Ci)
Ce1 + Cs1 + Ci1
1
+
Ce2 + Cs2 + Ci2
1
()
1
=
CLe
PD#
3V66, 66MHz
USB, 48MHz
PCI, 33MHz
REF
SRCT 100MHz
SRCC 100MHz
CPUC, 133MHz
CPUT, 133MHz
Figure 3. Power-down Assertion Timing Waveform
相关PDF资料 |
PDF描述 |
|---|---|
| CY28409AZXC | IC CLOCK CK409GRANTSDALE 56TSSOP |
| VE-B4H-MY-F3 | CONVERTER MOD DC/DC 52V 50W |
| VE-B4H-MY-F2 | CONVERTER MOD DC/DC 52V 50W |
| VE-B4F-MY-F4 | CONVERTER MOD DC/DC 72V 50W |
| VE-B4F-MY-F3 | CONVERTER MOD DC/DC 72V 50W |
相关代理商/技术参数 |
参数描述 |
|---|---|
| CY28409OCT | 功能描述:时钟合成器/抖动清除器 SysClk Intel Grntsdl 865 and 875 chipsets RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| CY28409OCXT | 制造商:CYPRESS 制造商全称:Cypress Semiconductor 功能描述:Clock Synthesizer with Differential SRC and CPU Outputs |
| CY28409OXC | 功能描述:时钟合成器/抖动清除器 SysClk Intel Grntsdl 865 and 875 chipsets RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| CY28409OXCT | 功能描述:时钟合成器/抖动清除器 SysClk Intel Grntsdl 865 and 875 chipsets RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| CY28409ZC | 制造商:CYPRESS 制造商全称:Cypress Semiconductor 功能描述:Clock Synthesizer with Differential SRC and CPU Outputs |
发布紧急采购，3分钟左右您将得到回复。