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参数资料
| 型号： | CY28547LFXC |
| 厂商： | Silicon Laboratories Inc |
| 文件页数： | 11/24页 |
| 文件大小： | 0K |
| 描述： | IC CLOCK CK505/410M INTEL 72QFN |
| 标准包装： | 240 |
| 类型： | 时钟/频率发生器 |
| PLL： | 是 |
| 主要目的： | Intel CPU 服务器 |
| 输入： | LVTTL，晶体 |
| 输出： | HCSL，LVCMOS |
| 电路数： | 1 |
| 比率 - 输入:输出： | 3:23 |
| 差分 - 输入:输出： | 无/是 |
| 频率 - 最大： | 200MHz |
| 电源电压： | 3.135 V ~ 3.465 V |
| 工作温度： | 0°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 72-VFQFN 裸露焊盘 |
| 供应商设备封装： | 72-QFN（10x10） |
| 包装： | 托盘 |
CY28547
.....................Document #: 001-05103 Rev *B Page 19 of 24
TPERI-
ODSSAbs
166 MHz CPUT and CPUC Absolute
period, SSC
Measured at 0V differential @ 1 clock
5.91444
6.11572
ns
TPERI-
ODSSAbs
200 MHz CPUT and CPUC Absolute
period, SSC
Measured at 0V differential @ 1 clock
4.91453
5.11060
ns
TPERI-
ODSSAbs
266 MHz CPUT and CPUC Absolute
period, SSC
Measured at 0V differential @ 1 clock
3.66465
3.85420
ns
TPERI-
ODSSAbs
333 MHz CPUT and CPUC Absolute
period, SSC
Measured at 0V differential @ 1 clock
2.91472
3.10036
ns
TPERI-
ODSSAbs
400 MHz CPUT and CPUC Absolute
period, SSC
Measured at 0V differential @ 1 clock
2.41477
2.59780
ns
TCCJ
CPU Cycle to Cycle Jitter
Measured at 0V differential
–
85
ps
TCCJ2
CPU2_ITP Cycle to Cycle Jitter
Measured at 0V differential
–
125
ps
LACC
Long-term Accuracy
Measured at 0V differential
–
100
ppm
TSKEW
CPU0 to CPU1 Clock Skew
Measured at 0V differential
–
100
ps
TSKEW2
CPU2_ITP to CPU0 Clock Skew
Measured at 0V differential
–
150
ps
TR / TF
CPU Rising/Falling Slew rate
Measured differentially from ±150 mV
2.5
8
V/ns
TRFM
Rise/Fall Matching
Measured single-endedly from ±75 mV
–
20
%
VHIGH
Voltage High
1.15
V
VLOW
Voltage Low
–0.3
–
V
VOX
Crossing Point Voltage at 0.7V Swing
300
550
mV
SRC at 0.7V
TDC
SRC Duty Cycle
Measured at 0V differential
45
55
%
TPERIOD
100 MHz SRC Period
Measured at 0V differential @ 0.1s
9.99900
10.0010
ns
TPERIODSS
100 MHz SRC Period, SSC
Measured at 0V differential @ 0.1s
10.02406 10.02607
ns
TPERIODAbs 100 MHz SRC Absolute Period
Measured at 0V differential @ 1 clock
9.87400
10.1260
ns
TPERI-
ODSSAbs
100 MHz SRC Absolute Period, SSC Measured at 0V differential @ 1 clock
9.87406
10.1762
ns
TSKEW(windo
w)
Any SRC Clock Skew from the
earliest bank to the latest bank
Measured at 0V differential
–
3.0
ns
TCCJ
SRC Cycle to Cycle Jitter
Measured at 0V differential
–
125
ps
LACC
SRC Long Term Accuracy
Measured at 0V differential
–
100
ppm
TR / TF
SRC Rising/Falling Slew Rate
Measured differentially from ±150 mV
2.5
8
V/ns
TRFM
Rise/Fall Matching
Measured single-endedly from ±75 mV
–
20
%
VHIGH
Voltage High
1.15
V
VLOW
Voltage Low
–0.3
–
V
VOX
Crossing Point Voltage at 0.7V Swing
300
550
mV
DOT96 at 0.7V
TDC
DOT96 Duty Cycle
Measured at 0V differential
45
55
%
TPERIOD
DOT96 Period
Measured at 0V differential at 0.1s
10.4156
10.4177
ns
TPERIODAbs DOT96 Absolute Period
Measured at 0V differential at 0.1s
10.1656
10.6677
ns
TCCJ
DOT96 Cycle to Cycle Jitter
Measured at 0V differential at 1 clock
–
250
ps
LACC
DOT96 Long Term Accuracy
Measured at 0V differential at 1 clock
–
100
ppm
TR / TF
DOT96 Rising/Falling Slew Rate
Measured differentially from ±150 mV
2.5
8
V/ns
TRFM
Rise/Fall Matching
Measured single-endedly from ±75 mV
–
20
%
VHIGH
Voltage High
1.15
V
AC Electrical Specifications (continued)
Parameter
Description
Condition
Min.
Max.
Unit
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