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参数资料
| 型号： | CY2DL814ZCT |
| 厂商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分类： | 时钟及定时 |
| 英文描述： | 1:4 Clock Fanout Buffer |
| 中文描述： | 2DL SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| 封装： | 4.40 MM, MO-153, TSSOP-16 |
| 文件页数： | 1/8页 |
| 文件大小： | 111K |
| 代理商： | CY2DL814ZCT |
1:4 Clock Fanout Buffer
ComLink Series
CY2DL814
Cypress Semiconductor Corporation
Document #: 38-07057 Rev. *A
3901 North First Street
San Jose
CA 95134
Revised December 14, 2002
408-943-2600
Features
Low-voltage operation
V
DD
= 3.3V
1:4 Fanout
Single-input configurable for
—
LVDS, LVPECL, or LVTTL
—
Four differential pairs of LVDS outputs
Drives 50- or 100-ohm load (selectable)
Low input capacitance
Low output skew
Does not exceed Bellcore 802.3 standards
Operation at
350 MHz
–
700 Mbps
Low propagation delay
Typical (tpd < 4 ns)
Industrial versions available
Packages available include TSSOP/SOIC
Description
The Cypress CY2 series of network circuits is produced using
advanced 0.35-micron CMOS technology, achieving the
industry
’
s fastest logic.
The Cypress CY2DL814 fanout buffer features a single
LVDS-, LVPECL-, or LVTTL-compatible input and four LVDS
output pairs.
Designed for data-communication clock management applica-
tions, the fanout from a single input reduces loading on the
input clock.
The CY2DL814 is ideal for both level translations from single
ended to LVDS and/or for the distribution of LVDS-based clock
signals. The Cypress CY2DL814 has configurable input and
output functions. The input can be selectable for
LVPECL/LVTTL or LVDS signals while the output driver
’
s
support standard and high drive LVDS. Drive either a 50-ohm
or 100-ohm line with a single part number/device.
Block Diagram
Pin Configuration
OUTPUT
LVDS
IN+
IN-
Q1A
Q1B
Q2A
Q2B
Q4A
Q4B
Q3A
Q3B
CNTRL
LVDS /
LVPECL /
LVTTL
CONFIG
EN1
EN2
C
16-pin TSSOP/SOIC
EN1
CONFIG
CNTRL
VDD
GND
IN+
IN-
EN2
Q1A
Q1B
Q2A
Q2B
Q3A
Q3B
Q4A
Q4B
1
2
3
4
5
6
7
8
10
9
11
12
13
14
15
16
相关PDF资料 |
PDF描述 |
|---|---|
| CY2DL814 | 1:4 Clock Fanout Buffer |
| CY2DL814SC | 1:4 Clock Fanout Buffer |
| CY2DL814SCT | 1:4 Clock Fanout Buffer |
| CY2DL814ZC | DB37 INTERFACE DATA CBL DB37 Male - DB37 Female |
| CY2DL814SI | 1:4 Clock Fanout Buffer |
相关代理商/技术参数 |
参数描述 |
|---|---|
| CY2DL814ZI | 制造商:CYPRESS 制造商全称:Cypress Semiconductor 功能描述:1:4 Clock Fanout Buffer |
| CY2DL814ZIT | 制造商:CYPRESS 制造商全称:Cypress Semiconductor 功能描述:1:4 Clock Fanout Buffer |
| CY2DL814ZXC | 功能描述:时钟缓冲器 3.3V 400MHz COM RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| CY2DL814ZXCT | 功能描述:时钟缓冲器 3.3V 400MHz COM RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| CY2DL814ZXI | 功能描述:时钟缓冲器 3.3V 400MHz LVDS Buffer RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
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