参数资料
型号: CY39200V388-233BGC
厂商: Cypress Semiconductor Corp.
英文描述: CPLDs at FPGA Densities
中文描述: CPLD器件在FPGA的密度
文件页数: 61/86页
文件大小: 1235K
代理商: CY39200V388-233BGC
Delta39K ISR
CPLD Family
Document #: 38-03039 Rev. *H
Page 61 of 86
B8
B9
B10
B11
B12
B13
B14
B15
B16
C1
C2
C3
C4
C5
C6
C7
C8
[19]
C9
[19]
C10
C11
C12
C13
C14
C15
C16
D1
D2
D3
D4
D5
D6
D7
D8
[19]
D9
[19]
D10
D11
D12
D13
D14
D15
D16
E1
E2
E3
IO/V
REF7
NC
V
CCPLL
V
CCIO6
IO6
IO6
IO6
GND
TDO
IO0
IO0
GND
IO7
IO7
V
CCIO7
V
CCIO7
NC
IO6
V
CCIO6
V
CCIO6
IO6
IO6
GND
TDI
IO5
IO0
IO0
IO0
GND
IO7
IO/V
REF7
IO7
IO7
NC
IO6
IO/V
REF6
IO6
GND
TCLK
IO5
IO5
IO0
IO0
IO0
IO/V
REF7
IO/VR
EF6
V
CCPLL
V
CCIO6
IO6
IO6
IO6
GND
TDO
IO0
IO0
GND
IO7
IO7
V
CCIO7
V
CCIO7
IO7
IO6
V
CCIO6
V
CCIO6
IO6
IO6
GND
TDI
IO5
IO0
IO0
IO0
GND
IO7
IO/V
REF7
IO7
IO7
IO6
IO6
IO/V
REF6
IO6
GND
TCLK
IO5
IO5
IO0
IO0
IO0
IO/V
REF7
IO/V
REF6
V
CCPLL
V
CCIO6
IO6
IO6
IO6
GND
TDO
IO0
IO0
GND
IO7
IO7
V
CCIO7
V
CCIO7
IO7
IO6
V
CCIO6
V
CCIO6
IO6
IO6
GND
TDI
IO5
IO0
IO0
IO0
GND
IO7
IO/V
REF7
IO7
IO7
IO6
IO6
IO/V
REF6
IO6
GND
TCLK
IO5
IO5
IO0
IO0
IO0
Table 13. 256 FBGA Pin Table
(continued)
Pin
CY39030
CY39050
CY39100
相关PDF资料
PDF描述
CY39200V388-233BGI CPLDs at FPGA Densities
CY39200V388-233MBC CPLDs at FPGA Densities
CY39200V388-233MBI CPLDs at FPGA Densities
CY39200V388-233NC CPLDs at FPGA Densities
CY39200V388-233NI CPLDs at FPGA Densities
相关代理商/技术参数
参数描述
CY39200V388-233MGC 制造商:CYPRESS 制造商全称:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39200V388-233MGI 制造商:CYPRESS 制造商全称:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39200V388-233NTC 制造商:CYPRESS 制造商全称:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39200V388-83MGC 制造商:Cypress Semiconductor 功能描述:
CY39200V484-125BBC 制造商:CYPRESS 制造商全称:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities