参数资料
型号: CY39200V388-233NC
厂商: Cypress Semiconductor Corp.
英文描述: CPLDs at FPGA Densities
中文描述: CPLD器件在FPGA的密度
文件页数: 39/86页
文件大小: 1235K
代理商: CY39200V388-233NC
Delta39K ISR
CPLD Family
Document #: 38-03039 Rev. *H
Page 39 of 86
39K100
125
CY39100V208B-125NTC
CY39100V256B-125BBC
CY39100V484B-125BBC
CY39100V388B-125MGC
CY39100V676B-125MBC
CY39100V208B-125NTI
CY39100V256B-125BBI
CY39100V484B-125BBI
CY39100V208B-83NTC
CY39100V256B-83BBC
CY39100V484B-83BBC
CY39100V388B-83MGC
CY39100V676B-83MBC
CY39100V208B-83NTI
CY39100V256B-83BBI
CY39100V484B-83BBI
CY39165V208-181NTC
CY39165V484-181BBC
CY39165V388-181MGC
CY39165V676-181MBC
CY39165V208-125NTC
CY39165V484-125BBC
CY39165V388-125MGC
CY39165V676-125MBC
CY39165V208-125NTI
CY39165V484-125BBI
CY39165V208-83NTC
CY39165V484-83BBC
CY39165V388-83MGC
CY39165V676-83MBC
CY39165V208-83NTI
CY39165V484-83BBI
NT208
BB256
BB484
MG388
MB676
NT208
BB256
BB484
NT208
BB256
BB484
MG388
MB676
NT208
BB256
BB484
NT208
BB484
MG388
MB676
NT208
BB484
MG388
MB676
NT208
BB484
NT208
BB484
MG388
MB676
NT208
BB484
208-Lead Enhanced Quad Flat Pack
256-Lead Fine Pitch Ball Grid Array
484-Lead Fine Pitch Ball Grid Array
388-Lead Ball Grid Array
676-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
256-Lead Fine Pitch Ball Grid Array
484-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
256-Lead Fine Pitch Ball Grid Array
484-Lead Fine Pitch Ball Grid Array
388-Lead Ball Grid Array
676-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
256-Lead Fine Pitch Ball Grid Array
484-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
484-Lead Fine Pitch Ball Grid Array
388-Lead Ball Grid Array
676-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
484-Lead Fine Pitch Ball Grid Array
388-Lead Ball Grid Array
676-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
484-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
484-Lead Fine Pitch Ball Grid Array
388-Lead Ball Grid Array
676-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
484-Lead Fine Pitch Ball Grid Array
Commercial
÷
÷
Industrial
83
Commercial
÷
÷
Industrial
39K165
181
Commercial
÷
÷
125
Commercial
÷
÷
Industrial
83
Commercial
÷
÷
Industrial
Delta39K Part Numbers (Ordering Information)
(continued)
Device
Speed
(MHz)
Ordering Code
Package
Name
Package Type
Self-Boot
Solution
Operating
Range
相关PDF资料
PDF描述
CY39200V388-233NI CPLDs at FPGA Densities
CY39200V388-233NTI CPLDs at FPGA Densities
CY39200V388-83BBC CPLDs at FPGA Densities
CY39200V388-83BBI CPLDs at FPGA Densities
CY39200V388-83BGC CPLDs at FPGA Densities
相关代理商/技术参数
参数描述
CY39200V388-233NTC 制造商:CYPRESS 制造商全称:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39200V388-83MGC 制造商:Cypress Semiconductor 功能描述:
CY39200V484-125BBC 制造商:CYPRESS 制造商全称:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39200V484-125BBI 制造商:CYPRESS 制造商全称:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39200V484-125BBXC 功能描述:CPLD - 复杂可编程逻辑器件 Delta39K 200K 125MHz COM RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100