参数资料
型号: CY7C106L-15VC
厂商: CYPRESS SEMICONDUCTOR CORP
元件分类: SRAM
英文描述: 256K X 4 STANDARD SRAM, 15 ns, PDSO28
封装: 0.400 INCH, PLASTIC, SOJ-28
文件页数: 1/9页
文件大小: 251K
代理商: CY7C106L-15VC
256K x 4 Static RAM
CY7C106
CY7C1006
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
Document #: 38-05033 Rev. **
Revised July 9, 1998
006
Features
High speed
—tAA = 12 ns
CMOS for optimum speed/power
Low active power
— 910 mW
Low standby power
— 275 mW
2.0V data retention (optional)
— 100
W
Automatic power-down when deselected
TTL-compatible inputs and outputs
Functional Description
The CY7C106 and CY7C1006 are high-performance CMOS
static RAMs organized as 262,144 words by 4 bits. Easy mem-
ory expansion is provided by an active LOW chip enable (CE),
an active LOW output enable (OE), and three-state drivers.
These devices have an automatic power-down feature that re-
duces power consumption by more than 65% when the devic-
es are deselected.
Writing to the devices is accomplished by taking chip enable
(CE) and write enable (WE) inputs LOW. Data on the four I/O
pins (I/O0 through I/O3) is then written into the location speci-
fied on the address pins (A0 through A17).
Reading from the devices is accomplished by taking chip en-
able (CE) and output enable (OE) LOW while forcing write en-
able (WE) HIGH. Under these conditions, the contents of the
memory location specified by the address pins will appear on
the four I/O pins.
The four input/output pins (I/O0 through I/O3) are placed in a
high-impedance state when the devices are deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a write
operation (CE and WE LOW).
The CY7C106 is available in a standard 400-mil-wide SOJ; the
CY7C1006 is available in a standard 300-mil-wide SOJ.
Logic Block Diagram
Pin Configuration
C106–1
C106–2
512 x 512 x 4
ARRAY
A1
A
0
A
10
A
12
A
11
A
13
A
14
COLUMN
DECODER
ROW
DE
CODE
R
S
E
N
S
E
AM
PS
POWER
DOWN
OE
INPUT BUFFER
A
15
A
16
A
17
1
2
3
4
5
6
7
8
9
10
11
14
15
16
20
19
18
17
21
24
23
22
Top View
SOJ
12
13
25
28
27
26
GND
A1
A2
A3
A4
A5
A6
A7
A8
A17
VCC
A16
A15
A14
A13
I/O3
I/O2
I/O1
I/O0
A9
A0
A10
CE
OE
NC
A12
A11
WE
CE
I/O0
I/O1
I/O2
I/O3
A2
A3
A4
A6
A7
A8
A9
A5
Selection Guide
7C106-12
7C1006-12
7C106-15
7C1006-15
7C106-20
7C1006-20
7C106-25
7C1006-25
7C106-35
Maximum Access Time (ns)
12
15
20
25
35
Maximum Operating
Current (mA)
165
155
145
130
125
Maximum Standby
Current (mA)
50
30
25
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