参数资料
型号: DAC1208D650HN
厂商: NXP Semiconductors N.V.
元件分类: 外设及接口
英文描述: Dual 12-bit DAC; up to 650 Msps; 2×, 4× or 8× interpolating
封装: DAC1208D650HN/C1<SOT804-3|<<<1<Always Pb-free,;DAC1208D650HN/C1<SOT804-3|<<<1<Always Pb-free,;
文件页数: 9/98页
文件大小: 557K
代理商: DAC1208D650HN
DAC1208D650
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 14 December 2010
9 of 98
NXP Semiconductors
DAC1208D650
2
×
, 4
×
or 8
×
interpolating DAC with JESD204A interface
Analog outputs (IOUTAP, IOUTAN, IOUTBP, IOUTBN)
I
O(fs)
full-scale output
current
register value = 00h
(see
Table 13
and
Table 14
)
register = default value
(see
Table 13
and
Table 14
)
compliance range
D
-
1.6
-
mA
-
20
-
mA
V
O
R
o
C
o
Δ
E
O
Δ
E
G
Reference voltage output (GAPOUT)
V
O(ref)
reference output
voltage
I
O(ref)
reference output
current
Δ
V
O(ref)
reference output
voltage variation
Analog auxiliary outputs (AUXAP, AUXAN, AUXBP and AUXBN)
I
O(aux)
auxiliary output current differential outputs
V
O(aux)
auxiliary output
voltage
N
DAC(aux)mono
auxiliary DAC
monotonicity
Input timing (Vin_p/Vin_n)
f
data
data rate
output voltage
output resistance
output capacitance
offset error variation
gain error variation
D
D
D
D
D
1.8
-
-
-
-
-
250
3
6
18
V
DDA(3V3)
-
-
-
-
V
k
Ω
pF
ppm/
°
C
ppm/
°
C
C
1.20
1.25
1.29
V
external voltage 1.2 V
C
-
40
-
μ
A
C
-
117
-
ppm/
°
C
I
D
-
0
2.2
-
-
2
mA
V
compliance range
guaranteed
D
-
10
-
bits
2
×
interpolation
4
×
interpolation
8
×
interpolation
serial input
D
D
D
D
-
-
-
0.7
-
-
-
-
312.5
162.5
81.25
3.125
Msps
Msps
Msps
Gbps
f
bit
Output timing (IOUTAP, IOUTAN, IOUTBP, IOUTBN)
f
s
sampling rate
t
s
settling time
NCO frequency range; f
s
= 650 Msps
f
NCO
NCO frequency
bit rate
D
D
-
-
-
20
650
-
Msps
ns
up to 0.5 LSB
register value = 00000000h
(see
Table 21
to
Table 24
)
register value = FFFFFFFFh
(see
Table 21
to
Table 24
)
D
-
0
-
MHz
D
-
650
-
MHz
f
step
Low power NCO frequency range; f
s
= 650 Msps
f
NCO
NCO frequency
step frequency
D
-
0.151
-
Hz
reg value = 00000000h
(see
Table 21
to
Table 24
)
reg value = F8000000h
(see
Table 21
to
Table 24
)
D
-
0
-
MHz
D
-
630
-
MHz
Table 5.
V
DDA(1V8)
= V
DDD
= 1.7 V to 1.9 V; V
DDA(3V3)
= 3.13 V to 3.47 V; AGND and GND are shorted together; T
amb
=
40
°
C to
+85
°
C; typical values measured at V
DDA(1V8)
= V
DDD
= 1.8 V; V
DDA(3V3)
= 3.3 V; T
amb
= +25
°
C; R
L
= 50
Ω
; I
O(fs)
= 20 mA;
maximum sample rate; PLL off unless otherwise specified.
Symbol
Parameter
Conditions
Characteristics
…continued
Test
[1]
Min
Typ
Max
Unit
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