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参数资料
| 型号： | DAC7545JP |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | DAC |
| 英文描述： | PARALLEL, WORD INPUT LOADING, 2 us SETTLING TIME, 12-BIT DAC, PDIP20 |
| 封装： | PLASTIC, MS-001AD, DIP-20 |
| 文件页数： | 10/14页 |
| 文件大小： | 552K |
| 代理商： | DAC7545JP |
DAC7545
5
SBAS150A
www.ti.com
APPLICATIONS
UNIPOLAR OPERATION
Figure 2 shows the DAC7545 connected for unipolar opera-
tion. The high-grade DAC7545 is specified for a 1LSB gain
error, so gain adjust is typically not needed; however, the
resistors shown are for adjusting full-scale errors. The value
of R1 should be minimized to reduce the effects of mismatch-
ing temperature coefficients between the internal and exter-
nal resistors. A range of adjustment of 1.5 times the desired
range will be adequate. For example, for a DAC7545JP, the
gain error is specified to be
±25LSB, therefore, a range of
adjustment of
±37LSB will be adequate. Equation 1 results in
a value of 458W for the potentiometer (use 500
).
R
Gain Error
LADDER
1
4096
3
=
(
)
(1)
FIGURE 2. Unipolar Binary Operation.
BINARY CODE
ANALOG OUTPUT
MSB
LSB
1111 1111 1111
–VIN (4095/4096)
1000 0000 0000
–VIN (2048/4096) = –1/2VIN
0000 0000 0001
–VIN (1/4096)
0000 0000 0000
0V
TABLE I. Unipolar Codes.
OPA604
V
IN
R
1
R
2
V
DD
R
FB
DAC7545 AGND
DGND
OUT 1
DB
0-DB11
C
1
33pF
+5V
V
OUT
V
REF
R3, R4, and R5 must match within 0.01% and must be the
same type of resistors (preferably wire-wound or metal foil),
so that the temperature coefficients match; mismatch of R3
value to R4 causes both offset and full-scale error. Mismatch
of R5 to R4 and R3 causes full-scale error.
FIGURE 3. Bipolar Operation (binary two’s complement code).
OPA604
or
1/2 OPA2604
V
IN
R
1
R
2
V
DD
R
FB
DAC7545
AGND
DB
10-DB0
OUT 1
Data Input
C
1
33pF
+5V
DB
11
V
REF
V
OUT
R
3
10k
R
4
20k
R
5
20k
R
6
5k
10%
U
1
(see text)
12
11
Analog Common
2
1
18
20
19
4
OPA604
or
1/2 OPA2604
DATA INPUT
ANALOG OUTPUT
MSB
LSB
0111 1111 1111
+VIN (2047/2048)
0000 0000 0001
+VIN (1/2048)
0000 0000 0000
0V
1111 1111 1111
–VIN (1/2048)
1000 0000 0000
–VIN (2048/2048)
TABLE II. Binary Two’s Complement Code Table for Circuit
of Figure 3.
tance. Eliminating this capacitor will result in excessive ringing
and an increase in glitch energy, therefore, this capacitor must
be as small as possible to minimize settling time.
The circuit of Figure 2 can be used with input voltages up to
±20V as long as the output amplifier is biased to handle the
excursions. Table I represents the analog output for four
codes into the DAC for Figure 2.
BIPOLAR OPERATION
Figure 3 and Table II illustrate the recommended circuit and
code relationship for bipolar operation. The DAC function uses
offset binary code. The inverter, U1, on the MSB line converts
binary two’s complement input code to offset binary code. If the
inversion is done in software, U1 can be omitted.
The addition of R1 will cause a negative gain error. To
compensate for this error, R2 must be added. The value of R2
should be one-third the value of R1.
The capacitor across the feedback resistor is used to compen-
sate for the phase shift due to stray capacitances of the circuit
board, the DAC output capacitance, and op amp input capaci-
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