参数资料
| 型号： | DAC8043GPZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 10/16页 |
| 文件大小： | 0K |
| 描述： | IC DAC 12BIT MULTIPLY CMOS 8-DIP |
| 产品培训模块： | Data Converter Fundamentals DAC Architectures |
| 标准包装： | 1 |
| 设置时间： | 250ns |
| 位数： | 12 |
| 数据接口： | 串行 |
| 转换器数目： | 1 |
| 电压电源： | 单电源 |
| 功率耗散（最大）： | 500µW |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 通孔 |
| 封装/外壳： | 8-DIP（0.300"，7.62mm） |
| 供应商设备封装： | 8-PDIP |
| 包装： | 管件 |
| 输出数目和类型： | 1 电流，单极；1 电流，双极 |
| 采样率（每秒）： | 366k |
DAC8043
Rev. E | Page 3 of 16
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
VDD = 5 V; VREF = 10 V; IOUT = GND = 0 V; TA = full temperature range specified under the Absolute Maximum Ratings, unless otherwise
noted.
Table 1.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
STATIC ACCURACY
Resolution
N
12
Bits
Nonlinearity1
INL
DAC8043G
±
LSB
DAC8043F
1
LSB
Differential Nonlinearity2
DNL
±1
LSB
Gain Error3
G
FSE
T
A = 25°C
2
LSB
T
A = full temperature range, all grades
2
LSB
Gain Tempco ( ΔGain/Temp)4
TC
GFS
±5
ppm/°C
Power Supply Rejection Ratio
(ΔGain/ΔV
DD)
PSRR
ΔV
DD = ±5%
±0.0006
±0.002
%/%
Output Leakage Current5
I
LKG
T
A = 25°C
±5
nA
T
A = full temperature range
±25
nA
Zero Scale Error6, 7
I
ZSE
T
A = 25°C
0.03
LSB
T
A = full temperature range
0.15
LSB
Input Resistance8
R
IN
7
11
15
k
AC PERFORMANCE
Output Current
Settling Time4, 9
t
S
T
A = 25°C, VREF = 0 V
0.25
1
μs
Digital-to-Analog Glitch Energy4, 10
Q
I
OUT load = 100 , CEXT = 13 pF, DAC register loaded
alternately with all 0s and all 1s
2
20
nVs
Feedthrough Error (V
FT
V
REF = 20 V p-p @ f = 10 kHz, digital input = 0000
0000 0000
0.7
1
mV p-p
T
A = 25°C
Total Harmonic Distortion4
THD
V
REF = 6 V rms @ 1 kHz, DAC register loaded with
all 1s
–85
dB
Output Noise Voltage Density4, 12
e
n
10 Hz to 100 kHz between R
FB and IOUT
17
nV/√Hz
DIGITAL INPUTS
Digital Input
High
V
IN
2.4
V
Low
V
IL
0.8
V
Input Leakage Current13
I
IL
V
IN = 0 V to +5 V
±1
μA
Input Capacitance4, 11
C
IN
V
IN = 0 V
8
pF
ANALOG OUTPUTS
Output Capacitance4
C
OUT
Digital inputs = V
IH
110
pF
Digital inputs = V
IL
80
pF
TIMING CHARACTERISTICS4, 14
Data Setup Time
t
DS
T
A = full temperature range
40
ns
Data Hold Time
t
DH
T
A = full temperature range
80
ns
Clock Pulsewidth High
t
CH
T
A = full temperature range
90
ns
Clock Pulsewidth Low
t
CL
T
A = full temperature range
120
ns
Load Pulsewidth
t
LD
T
A = full temperature range
120
ns
LSB Clock Into Input Register to
Load DAC Register Time
t
ASB
T
A = full temperature range
0
ns
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