参数资料
| 型号： | DAC8222GPZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 15/15页 |
| 文件大小： | 0K |
| 描述： | IC DAC 12BIT DUAL W/BUFF 24DIP |
| 产品培训模块： | Data Converter Fundamentals DAC Architectures |
| 标准包装： | 15 |
| 设置时间： | 1µs |
| 位数： | 12 |
| 转换器数目： | 2 |
| 电压电源： | 单电源 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 通孔 |
| 封装/外壳： | 24-DIP（0.300"，7.62mm） |
| 供应商设备封装： | 24-PDIP |
| 包装： | 管件 |
| 输出数目和类型： | 2 电流，单极；2 电流，双极 |
| 采样率（每秒）： | 1M |
DAC8222
–9–
REV. C
Table I. Mode Selection
Digital Inputs
Register Status
DAC A
DAC B
DAC
A/B
WR
LDAC
Input Register
DAC Register
Input Register
DAC Register
L
WRITE
LATCHED
WRITE
H
L
LATCHED
WRITE
L
H
WRITE
LATCHED
H
L
H
LATCHED
WRITE
LATCHED
X
H
L
LATCHED
WRITE
LATCHED
WRITE
X
H
LATCHED
L = Low, H = High, X = Don’t Care
WRITE TIMING CYCLES
Two timing diagrams are shown and are at the user’s discretion
which to use.
The TWO-CYCLE UPDATE, as the name implies, allows both
DAC registers to be loaded and the outputs updated in two
cycles. Data is first loaded into one DAC’s input register on the
first write cycle, and then new data loaded into the other DAC’s
input register while simultaneously updating both DAC outputs
on the second cycle.
The THREE-CYCLE UPDATE allows
DAC A and DAC B
registers to be loaded and analog output to be updated at a later
time. The first two cycles load both DACs as above, and the
third cycle updates the outputs.
The
LDAC and DAC A/DAC B control pins can be tied to-
gether and controlled with a single strobe. When using the DAC
in this configuration, DAC B must be loaded first.
INTERFACE CONTROL LOGIC
DAC A/DAC B (Pin 18)–DAC Selection. Active low for
DAC A and active high for DAC B.
WR (Pin 20)–WRITE. Active Low. Used to write data into
either DAC A or DAC B input registers, or active high latches
data into the input registers.
LDAC (Pin 19)–LOAD DAC. Active Low. Used to simulta-
neously transfer data from
DAC A and DAC B input registers
to both DAC outputs. The DAC becomes transparent (activity
on the digital inputs appear at the analog output) when both
WR and LDAC are low. Data is latched into the output regis-
ters on the rising edge of
LDAC.
Three-Cycle Update
Figure 23. Write Cycle Timing Diagram
Two-Cycle Update
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DAC8222HP | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| DAC8222HS | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| DAC8228 | 制造商:AD 制造商全称:Analog Devices 功能描述:Dual 8-Bit CMOS D/A Converter with Voltage Output |
| DAC8228FP | 功能描述:IC DAC 8BIT DUAL V-OUT 20-DIP RoHS:否 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 标准包装:2,400 系列:- 设置时间:- 位数:18 数据接口:串行 转换器数目:3 电压电源:模拟和数字 功率耗散（最大）:- 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:36-TFBGA 供应商设备封装:36-TFBGA 包装:带卷 (TR) 输出数目和类型:* 采样率（每秒）:* |
| DAC8228FPZ | 功能描述:IC DAC 8BIT DUAL V-OUT 20DIP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 标准包装:47 系列:- 设置时间:2µs 位数:14 数据接口:并联 转换器数目:1 电压电源:单电源 功率耗散（最大）:55µW 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:28-SSOP（0.209"，5.30mm 宽） 供应商设备封装:28-SSOP 包装:管件 输出数目和类型:1 电流，单极；1 电流，双极 采样率（每秒）:* |
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