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参数资料
| 型号： | DAC8512FSZ-REEL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 18/20页 |
| 文件大小： | 0K |
| 描述： | IC DAC 12BIT SRL LP 5V 8SOIC |
| 产品培训模块： | Data Converter Fundamentals DAC Architectures |
| 标准包装： | 1,000 |
| 设置时间： | 16µs |
| 位数： | 12 |
| 数据接口： | 串行 |
| 转换器数目： | 1 |
| 电压电源： | 单电源 |
| 功率耗散（最大）： | 2.5mW |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOIC |
| 包装： | 带卷 (TR) |
| 输出数目和类型： | 1 电压，单极；1 电压，双极 |
| 采样率（每秒）： | 62.5k |
REV. A
–7–
Typical Performance Characteristics — DAC8512
5
2
0
10
100
100k
10k
1k
1
3
4
LOAD RESISTANCE –
OUTPUT
VOLTAGE
–
Volts
RL TIED TO AGND
D = FFFH
R
L TIED TO AGND
DATA = FFF
H
V
DD = +5V
T
A = +25 C
R
L TIED TO +5V
DATA = 000H
Figure 5. Output Swing vs. Load
TIME = 2ms/DIV
OUTPUT
NOISE
VOLTAGE
–
500
V/DIV
10
90
100
0%
SCALE = 100X
CODE = FFF
H = 409510
BW = 630kHz
T
A = +25 C
2mS
50mV
Figure 8. Broadband Noise
0.01
0.1
10
1.0
5.0
4.8
4.0
4.6
4.4
4.2
0.04
0.4
4.0
OUTPUT LOAD CURRENT – mA
V
DD
MIN
–
Volts
VFS ≤ 1 LSB
DATA = FFF
H
T
A = +25 C
PROPER OPERATION
WHEN V
DD SUPPLY
VOLTAGE ABOVE
CURVE
Figure 11. Minimum Supply Voltage
vs. Load
1
10
1000
100
1
0.01
0.1
10
OUTPUT SINK CURRENT –
A
OUTPUT
PULL-DOWN
VOLTAGE
–
mV
V
DD = +5V
DATA = 000
H
T
A = +85 C
T
A = –40 C
T
A = +25 C
Figure 6. Pull-Down Voltage vs. Out-
put Sink Current Capability
4.0
0.0
5
0.8
0
2.4
1.6
3.2
3
24
1
LOGIC VOLTAGE VALUE – Volts
SUPPLY
CURRENT
–
mA
V
DD = +5V
T
A = +25 C
NO LOAD
Figure 9. Supply Current vs. Logic
Input Voltage
2.028
2.018
2.048
2.038
0
5
TIME – 200ns/DIV
V
OUT
–
Volts
LD
2048
10
TO 2047
10
V
DD
= 5V
T
A
= +25 C
Figure 12. Midscale DAC Glitch
Performance
80
–100
–60
–80
1
–20
–40
0
20
40
60
3
2
OUTPUT VOLTAGE – Volts
OUTPUT
CURRENT
–
mA
POS0
CURRENT0
LIMIT0
NEG
CURRENT
LIMIT
DATA = 800H
RL TIED TO +2V
Figure 7. Short Circuit Current
100
0
10
100
100k
10k
1k
60
80
20
40
POWER
SUPPLY
REJECTION
–
dB
FREQUENCY – Hz
V
DD = +5V
200mV AC
T
A = +25 C
DATA = FFF
H
Figure 10. Power Supply Rejection
vs. Frequency
10
90
100
0%
TIME = 20
s/DIV
20
s
1V
R
L = NO LOAD
C
L = 110pF
T
A = +25 C
1V/DIV
Figure 13. Large Signal Settling Time
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