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| 型号： | DAC8564ICPWR |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | DAC |
| 英文描述： | SERIAL INPUT LOADING, 12 us SETTLING TIME, 16-BIT DAC, PDSO16 |
| 封装： | GREEN, PLASTIC, TSSOP-16 |
| 文件页数： | 36/51页 |
| 文件大小： | 1549K |
| 代理商： | DAC8564ICPWR |
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SBAS403D
– JUNE 2007 – REVISED MAY 2011
PARAMETER DEFINITIONS
With the increased complexity of many different
Full-Scale Error
specifications listed in product data sheets, this
section summarizes selected specifications related to
Full-scale error is defined as the deviation of the real
digital-to-analog converters.
full-scale output voltage from the ideal output voltage
while the DAC register is loaded with the full-scale
STATIC PERFORMANCE
code (0xFFFF). Ideally, the output should be VDD – 1
LSB. The full-scale error is expressed in percent of
Static performance parameters are specifications
full-scale range (%FSR).
such as differential nonlinearity (DNL) or integral
nonlinearity (INL). These are dc specifications and
Offset Error
provide information on the accuracy of the DAC. They
are most important in applications where the signal
The offset error is defined as the difference between
changes slowly and accuracy is required.
actual output voltage and the ideal output voltage in
the linear region of the transfer function. This
Resolution
difference is calculated by using a straight line
defined by two codes (code 485 and 64714). Since
Generally, the DAC resolution can be expressed in
the offset error is defined by a straight line, it can
different forms. Specifications such as IEC 60748-4
have a negative or positive value. Offset error is
recognize
the
numerical,
analog,
and
relative
measured in mV.
resolution. The numerical resolution is defined as the
number of digits in the chosen numbering system
Zero-Code Error
necessary to express the total number of steps of the
transfer characteristic, where a step represents both
The zero-code error is defined as the DAC output
a digital input code and the corresponding discrete
voltage, when all '0's are loaded into the DAC
analogue output value. The most commonly-used
register. Zero-scale error is a measure of the
definition of resolution provided in data sheets is the
difference between actual output voltage and ideal
numerical resolution expressed in bits.
output voltage (0V). It is expressed in mV. It is
primarily caused by offsets in the output amplifier.
Least Significant Bit (LSB)
Gain Error
The least significant bit (LSB) is defined as the
smallest value in a binary coded system. The value of
Gain error is defined as the deviation in the slope of
the LSB can be calculated by dividing the full-scale
the real DAC transfer characteristic from the ideal
output voltage by 2n, where n is the resolution of the
transfer function. Gain error is expressed as a
converter.
percentage of full-scale range (%FSR).
Most Significant Bit (MSB)
Full-Scale Error Drift
The most significant bit (MSB) is defined as the
Full-scale error drift is defined as the change in
largest value in a binary coded system. The value of
full-scale
error
with
a
change
in
temperature.
the MSB can be calculated by dividing the full-scale
Full-scale
error
drift
is
expressed
in
units
output voltage by 2. Its value is one-half of full-scale.
of %FSR/
°C.
Relative Accuracy or Integral Nonlinearity (INL)
Offset Error Drift
Relative accuracy or integral nonlinearity (INL) is
Offset error drift is defined as the change in offset
defined as the maximum deviation between the real
error with a change in temperature. Offset error drift
transfer function and a straight line passing through
is expressed in
μV/°C.
the endpoints of the ideal DAC transfer function. DNL
is measured in LSBs.
Zero-Code Error Drift
Zero-code error drift is defined as the change in
Differential Nonlinearity (DNL)
zero-code error with a change in temperature.
Differential nonlinearity (DNL) is defined as the
Zero-code error drift is expressed in
μV/°C.
maximum deviation of the real LSB step from the
ideal 1LSB step. Ideally, any two adjacent digital
codes correspond to output analog voltages that are
exactly one LSB apart. If the DNL is less than 1LSB,
the DAC is said to be monotonic.
Copyright
2007–2011, Texas Instruments Incorporated
41
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| DAC8564ICPWRG4 | 功能描述:数模转换器- DAC 16B vOut DAC quad chan Ultra Lo glitch RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
| DAC8564IDPW | 功能描述:数模转换器- DAC 16B Quad Ch Ultra-Lo Glitch Vltg Output RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
| DAC8564IDPWG4 | 功能描述:数模转换器- DAC 16B vOut DAC quad chan Ultra Lo glitch RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
| DAC8564IDPWR | 功能描述:数模转换器- DAC 16B Quad Ch Ultra-Lo Glitch Vltg Output RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
| DAC8564IDPWRG4 | 功能描述:数模转换器- DAC 16B vOut DAC quad chan Ultra Lo glitch RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
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