参数资料
型号: DAC902U
元件分类: DAC
英文描述: PARALLEL, WORD INPUT LOADING, 0.03 us SETTLING TIME, 12-BIT DAC, PDSO28
封装: SO-28
文件页数: 6/16页
文件大小: 216K
代理商: DAC902U
14
DAC902
The DC gain for this circuit is equal to feedback resistor RF.
At high frequencies, the DAC output impedance (CD1, CD2)
will produce a zero in the noise gain for the OPA2680 that
may cause peaking in the closed-loop frequency response.
CF is added across RF to compensate for this noise gain
peaking. To achieve a flat transimpedance frequency re-
sponse, the pole in each feedback network should be set to:
1
24
ππ
RC
GBP
RC
FF
F
D
=
(8)
with GBP = Gain Bandwidth Product of OPA
which will give a corner frequency f-3dB of approximately:
f
GBP
RC
dB
FD
=
3
2
π
(9)
The full-scale output voltage is simply defined by the prod-
uct of IOUTFS RF, and has a negative unipolar excursion. To
improve on the ac performance of this circuit, adjustment of
RF and/or IOUTFS should be considered. Further extensions of
this application example may include adding a differential
filter at the OPA2680’s output followed by a transformer, in
order to convert to a single-ended signal.
SINGLE-ENDED CONFIGURATION
Using a single load resistor connected to the one of the DAC
outputs, a simple current-to-voltage conversion can be ac-
complished. The circuit in Figure 6 shows a 50
resistor
connected to IOUT, providing the termination of the further
connected 50
cable. Therefore, with a nominal output
current of 20mA, the DAC produces a total signal swing of
0 to 0.5V into the 25
load.
Different load resistor values may be selected as long as the
output compliance range is not exceeded. Additionally, the
output current, IOUTFS, and the load resistor, may be mutu-
ally adjusted to provide the desired output signal swing and
performance.
FIGURE 6. Driving a Doubly Terminated 50
Cable Directly.
I
OUT
I
OUT
DAC902
25
50
50
I
OUTFS = 20mA
V
OUT = 0V to +0.5V
FIGURE 7. Internal Reference Configuration.
INTERNAL REFERENCE OPERATION
The DAC902 has an on-chip reference circuit which com-
prises a 1.24V bandgap reference and a control amplifier.
Grounding of pin 16, INT/EXT, enables the internal refer-
ence operation. The full-scale output current, IOUTFS, of the
DAC902 is determined by the reference voltage, VREF, and
the value of resistor RSET. IOUTFS can be calculated by:
IOUTFS = 32 IREF = 32 VREF / RSET
(10)
As shown in Figure 7, the external resistor RSET connects to
the FSA pin (Full-Scale Adjust). The reference control
amplifier operates as a V to I converter producing a refer-
ence current, IREF, which is determined by the ratio of VREF
and RSET (see Equation 10). The full-scale output current,
IOUTFS, results from multiplying IREF by a fixed factor of 32.
Using the internal reference, a 2k
resistor value results in
a 20mA full-scale output. Resistors with a tolerance of 1%
or better should be considered. Selecting higher values, the
converter output can be adjusted from 20mA down to 2mA.
Operating the DAC902 at lower than 20mA output currents
may be desirable for reasons of reducing the total power
consumption, improving the distortion performance, or ob-
serving the output compliance voltage limitations for a given
load condition.
It is recommended to bypass the REFIN pin with a ceramic chip
capacitor of 0.1
F or more. The control amplifier is internally
compensated, and its small signal bandwidth is approximately
3MHz. To improve the ac performance, an additional capacitor
(CCOMPEXT) should be applied between the BW pin and the
analog supply, +VA, as shown in Figure 7. Using a 0.1F
capacitor, the small-signal bandwidth and output impedance of
the control amplifier is further diminished, reducing the noise
that is fed into the current source array. This also helps
shunting feedthrough signals more effectively, and improving
the noise performance of the DAC902.
DAC902
C
COMPEXT
0.1
F
C
COMP
400pF
+1.24V Ref.
R
SET
2k
0.1
F
INT/EXT
FSA
BW
+5V
+V
A
REF
IN
Current
Sources
I
REF =
V
REF
R
SET
Ref
Control
Amp
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