参数资料
型号: DC1010A-A
厂商: Linear Technology
文件页数: 10/32页
文件大小: 0K
描述: BOARD DELTA SIGMA ADC LTC2493
软件下载: QuikEval System
设计资源: DC1010A Design File
DC1010A Schematic
标准包装: 1
系列: Easy Drive™, QuikEval™
ADC 的数量: 1
位数: 24
采样率(每秒): 15
数据接口: I²C,串行
已用 IC / 零件: LTC2493
已供物品:
相关产品: LTC2493IDE#TRPBF-ND - IC ADC 24BIT DELTA SIG 14-DFN
LTC2493CDE#TRPBF-ND - IC ADC 24BIT DELTA SIG 14-DFN
LTC2493CDE#PBF-ND - IC ADC 24BIT DELTA SIG 14-DFN
LTC2493IDE#PBF-ND - IC ADC 24BIT DELTA SIG 14-DFN
LTC2493
18
2493fd
The first input bit (SGL) following the 101 sequence de-
termines if the input selection is differential (SGL = 0) or
single-ended (SGL = 1). For SGL = 0, two adjacent chan-
nels can be selected to form a differential input. For SGL
= 1, one of four channels is selected as the positive input.
The negative input is COM for all single-ended operations.
The remaining four bits (ODD, A2, A1, A0) determine
which channel(s) is/are selected and the polarity (for a
differential input).
Once the first word is written into the device, a second
word may be input in order to select a configuration mode.
The first bit of the second word is the enable bit for the
conversion configuration (EN2). If this bit is set to 0, then
the next conversion is performed using the previously
selected converter configuration.
The second set of configuration data can be loaded into
the device by setting EN2 = 1 (see Table 4). The first bit
(IM) is used to select the internal temperature sensor. If
IM = 1, the following conversion will be performed on
the internal temperature sensor rather than the selected
input channel. The next two bits (FA and FB) are used to
set the rejection frequency. The final bit (SPD) is used to
select either the 1× output rate if SPD = 0 (auto-calibration
is enabled and the offset is continuously calibrated and
removed from the final conversion result) or the 2× output
rate if SPD = 1 (offset calibration disabled, multiplexing
output rates up to 15Hz with no latency). When IM = 1
(temperature measurement) SPD will be ignored and the
device will operate in 1× mode.
The configuration remains valid until a new input word with
EN=1(thefirstthreebitsare101forthefirstword)andEN2
= 1 (for the second write byte) is shifted into the device.
Rejection Mode (FA, FB)
The LTC2493 includes a high accuracy on-chip oscillator
with no required external components. Coupled with an
integrated fourth order digital lowpass filter, the LTC2493
rejects line frequency noise. In the default mode, the
LTC2493 simultaneously rejects 50Hz and 60Hz by at least
87dB. If more rejection is required, the LTC2493 can be
configured to reject 50Hz or 60Hz to better than 110dB.
Table 4. Converter Configuration
1
0
EN
SGL
ODD
A2
A1
A0
EN2
IM
FA
FB
SPD
CONVERTER CONFIGURATION
1
0
X
Keep Previous
1
0
1
X
0
X
Keep Previous
0
1
X
Keep Previous
1
0
1
X
1
0
External Input (See Table 3)
50Hz/60Hz Rejection, 1×
1
0
1
X
1
0
1
0
External Input (See Table 3)
50Hz Rejection, 1×
1
0
1
X
1
0
1
0
External Input (See Table 3)
60Hz Rejection, 1×
1
0
1
X
1
0
1
External Input (See Table 3)
50Hz/60Hz Rejection, 2×
1
0
1
X
1
0
1
External Input (See Table 3)
50Hz Rejection, 2×
1
0
1
X
1
0
1
0
1
External Input (See Table 3)
60Hz Rejection, 2×
1
0
1
X
1
0
X
Measure Temperature
50Hz/60Hz Rejection, 1×
1
0
1
X
1
0
1
X
Measure Temperature
50Hz Rejection, 1×
1
0
1
X
1
0
X
Measure Temperature
60Hz Rejection, 1×
1
0
1
X
1
X
1
X
Reserved, Do Not Use
applicaTions inForMaTion
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