参数资料
型号: DC1195A
厂商: Linear Technology
文件页数: 12/24页
文件大小: 0K
描述: BOARD DEMO LTM8023
软件下载: LTM8023 Spice Model
设计资源: DC1195A Schematic
标准包装: 1
系列: µModule®
主要目的: DC/DC,步降
输出及类型: 1,非隔离
输出电压: 3.3V
电流 - 输出: 2A
输入电压: 5 ~ 36 V
稳压器拓扑结构: 降压
频率 - 开关: 600kHz
板类型: 完全填充
已供物品:
已用 IC / 零件: LTM8023
相关产品: LTM8023MPV#PBF-ND - IC BUCK SYNC ADJ 2A 50LGA
LTM8023IV#PBF-ND - IC BUCK SYNC ADJ 2A 50LGA
LTM8023EV#PBF-ND - IC BUCK SYNC ADJ 2A 50LGA
LTM8023
APPLICATIONS INFORMATION
Load Sharing
Two or more LTM8023’s may be paralleled to produce higher
currents. To do this, tie the V IN , ADJ, V OUT and SHARE
pins of all the paralleled LTM8023’s together. To ensure
that paralleled modules start up together, the RUN/SS pins
may be tied together, as well. If the RUN/SS pins are not
tied together, make sure that the same valued soft-start
capacitors are used for each module. An example of two
LTM8023 modules configured for load sharing is given in
the Typical Applications section.
For current sharing applications using multiple LTM8023s,
the ADJ pins for all regulators may be combined using
one resistor to ground as determined by:
394.21
Minimum Input Voltage
The LTM8023 is a step-down converter, so a minimum
amount of headroom is required to keep the output in
regulation. In addition, the input voltage required to turn
on is higher than that required to run, and depends upon
whether the RUN/SS is used. As shown in Figure 2, it
takes only about 3.5V IN for the LTM8023 to run a 3.3V
output at light load. If RUN/SS is tied to V IN , a 5.5V input
voltage is required to start. If V IN is allowed to settle in
the operating region first then the RUN/SS pin is enabled,
the minimum input voltage to start at light load is lower,
about 4.2V . A similar curve for 5V OUT operation is also
provided in Figure 2.
6.0
R ADJ =
N
V OUT – 0.79
5.5
5.0
TO START
where N is the number of paralled modules and R ADJ is
in kΩ.
4.5
4.0
RUN/SS ENABLED
TO RUN
3.0
TO START
RUN/SS ENABLED
V OUT = 5V
5.0
Burst Mode Operation
To enhance efficiency at light loads, the LTM8023 auto-
matically switches to Burst Mode operation which keeps
the output capacitor charged to the proper voltage while
minimizing the input quiescent current. During Burst Mode
operation, the LTM8023 delivers single cycle bursts of
current to the output capacitor followed by sleep periods
where the output power is delivered to the load by the output
capacitor. In addition, V IN and BIAS quiescent currents are
reduced to typically 25μA and 50μA respectively during
the sleep time. As the load current decreases towards a no
load condition, the percentage of time that the LTM8023
operates in sleep mode increases and the average input
current is greatly reduced, resulting in higher efficiency.
Burst Mode operation is enabled by tying SYNC to GND.
To disable Burst Mode operation, tie SYNC to a stable
voltage above 0.7V or synchronize to an external clock.
Do not leave the SYNC pin floating.
3.5 V OUT = 3.3V
T A = 25°C
f = 650kHz
0 500 1000 1500 2000
LOAD CURRENT (mA)
7.5
7.0
6.5
6.0
5.5
T A = 25°C
TO RUN f = 650kHz
0 500 1000 1500 2000
LOAD CURRENT (mA)
8023 F02
Figure 2. The LTM8023 Needs More Voltage to Start Than to Run
8023fi
12
For more information www.linear.com/LTM8023
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