参数资料
型号: DC1444A-B
厂商: Linear Technology
文件页数: 23/26页
文件大小: 0K
描述: BOARD SAR ADC LTC2305
软件下载: QuikEval System
设计资源: DC1444A Design File
DC1444A Schematic
标准包装: 1
系列: QuikEval™
ADC 的数量: 2
位数: 12
采样率(每秒): 14k
数据接口: I²C,串行
在以下条件下的电源(标准): 1.5mW @ 1kSPS
工作温度: 0°C ~ 70°C
已用 IC / 零件: LTC2305
已供物品:
相关产品: LTC2305IMS#TRPBF-ND - IC ADC 12-BIT 2CHN 12-MSOP
LTC2305IDE#TRPBF-ND - IC ADC 12-BIT 2CHN 12-DFN
LTC2305IDE#PBF-ND - IC ADC 12-BIT 2CHN 12-DFN
LTC2305HMS#TRPBF-ND - IC ADC 12-BIT 2CHN 12-MSOP
LTC2305HMS#PBF-ND - IC ADC 12-BIT 2CHN 12-MSOP
LTC2305CMS#TRPBF-ND - IC ADC 12-BIT 2CHN 12-MSOP
LTC2305CMS#PBF-ND - IC ADC 12-BIT 2CHN 12-MSOP
LTC2305CDE#TRPBF-ND - IC ADC 12-BIT 2CHN 12-DFN
LTC2305CDE#PBF-ND - IC ADC 12-BIT 2CHN 12-DFN
LTC2305IMS#PBF-ND - IC ADC 12BIT I2C 12-MSOP
LTC2301/LTC2305
6
23015fb
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to ground.
Note 3: When these pin voltages are taken below ground or above VDD,
they will be clamped by internal diodes. These products can handle input
currents greater than 100mA below ground or above VDD without latchup.
Note 4: VDD = 5V, fSMPL = 14kHz, internal reference unless otherwise
noted.
Note 5: Integral nonlinearity is dened as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 6: Bipolar zero error is the offset voltage measured from –0.5 LSB
when the output code ickers between 0000 0000 0000 and 1111 1111
1111. Unipolar zero error is the offset voltage measured from 0.5 LSB
when the output code ickers between 0000 0000 0000 and 0000 0000
0001.
Note 7: Full-scale bipolar error is the worst-case of –FS or FS untrimmed
deviation from ideal rst and last code transitions and includes the effect
of offset error. Unipolar full-scale error is the deviation of the last code
transition from ideal and includes the effect of offset error.
Note 8: Guaranteed by design, not subject to test.
Note 9: All specications in dB are referred to a full-scale ±2.048V input
with a 2.5V reference voltage.
Note 10: Full linear bandwidth is dened as the full-scale input frequency
at which the SINAD degrades to 60dB or 10 bits of accuracy.
Note 11: CB = capacitance of one bus line in pF (10pF ≤ CB ≤ 400pF)
Note 12: REFCOMP wakeup time is the time required for the REFCOMP pin
to settle within 0.5 LSB at 12-bit resolution of its nal value after waking
up from sleep mode.
Note 13: High temperatures degrade operating lifetimes. Operating lifetime
is derated at temperatures greater than 105°C.
ELECTRICAL CHARACTERISTICS
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