参数资料
型号: DC1496B-B
厂商: Linear Technology
文件页数: 12/18页
文件大小: 0K
描述: BOARD EVAL LTC2942
软件下载: QuikEval System
设计资源: DC1496B Design Files
标准包装: 1
系列: QuikEval™
主要目的: 电源管理,燃料量计
嵌入式:
已用 IC / 零件: LTC2942
主要属性: I²C、SMBus 接口
次要属性: LED 状态指示器
已供物品: 板,线缆
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LTC2942IDCB#TRMPBFDKR-ND - IC FUEL/GAS GAUGE LI-ION 6DFN
LTC2942IDCB#TRMPBFCT-ND - IC FUEL/GAS GAUGE LI-ION 6DFN
LTC2942IDCB-1#TRPBF-ND - IC FUEL/GAS GAUGE LI-ION 1A 6DFN
LTC2942CDCB-1#TRPBF-ND - IC FUEL/GAS GAUGE LI-ION 1A 6DFN
LTC2942IDCB-1#TRMPBFDKR-ND - IC FUEL/GAS GAUGE LI-ION 1A 6DFN
LTC2942CDCB-1#TRMPBFDKR-ND - IC FUEL/GAS GAUGE LI-ION 1A 6DFN
LTC2942IDCB-1#TRMPBFCT-ND - IC FUEL/GAS GAUGE LI-ION 1A 6DFN
LTC2942CDCB-1#TRMPBFCT-ND - IC FUEL/GAS GAUGE LI-ION 1A 6DFN
LTC2942IDCB-1#TRMPBFTR-ND - IC FUEL/GAS GAUGE LI-ION 1A 6DFN
更多...
LTC2942
APPLICATIONS INFORMATION
RESULT h RESULT DEC
FFFF h
T = 600 K ? = 600 K ?
V SENSE – = 6V ?
RESULT h RESULT DEC
V SENSE – = 6 V ?
B 01 C h 45084 DEC
AccumulatedChargeRegister(C,D)
The coulomb counter of the LTC2942 integrates current
through the sense resistor. The result of this charge inte-
gration is stored in the 16-bit accumulated charge register
(registers C, D). As the LTC2942 does not know the actual
battery status at power-up, the accumulated charge register
(ACR) is set to mid-scale (7FFFh). If the host knows the
status of the battery, the accumulated charge (C[7:0]D[7:0])
can be either programmed to the correct value via I 2 C or
it can be set after charging to FFFFh (full) by pulling the
AL /CC pin high if charge complete mode is enabled via
bits B[2:1]. Before writing the accumulated charge regis-
ters, the analog section should be shut down by setting
B[0] to 1. In order to avoid a change in the accumulated
charge registers between reading MSBs C[7:0] and LSBs
D[7:0], it is recommended to read them sequentially, as
shown in Figure 10.
Voltage and Temperature Registers (I, J), (M, N)
The result of the 14-bit ADC conversion of the voltage at
SENSE – is stored in the voltage registers (I, J), whereas
the temperature measurement result is stored in the tem-
perature registers (M, N). The voltage and temperature
registers are read only.
As the ADC resolution is 14-bit in voltage mode and 10-bit
in temperature mode, the lowest two bits of the combined
voltage registers (I, J) and the lowest six bits of the
combined temperature registers (M, N) are always zero.
From the result of the 16-bit voltage registers I[7:0]J[7:0]
the measured voltage can be calculated as:
= 6V ?
FFFF h 65535
Example: a register value of I[7:0] = B0 h and J[7:0] = 1C h
corresponds to a voltage on SENSE – of:
= 6 V ? ≈ 4 . 12776V
FFFF h 65535
The actual temperature can be obtained from the two byte
register C[7:0]D[7:0] by:
65535
Example: a register value of C[7:0] = 80 h D[7:0] = 00 h
corresponds to 300K or 27°C.
Threshold Registers (E, F, G, H, K, L, O, P)
For each of the measured quantities (battery charge, volt-
age and temperature) the LTC2942 features a high and a
low threshold registers. At power-up, the high thresholds
are set to FFFFh while the low thresholds are set to 0000h.
All thresholds can be programmed to a desired value via
I 2 C. As soon as a measured quantity exceeds the high
threshold or falls below the low threshold, the LTC2942
sets the corresponding flag in the status register and
pulls the AL /CC pin low if alert mode is enabled via bits
B[2:1]. Note that the voltage and temperature threshold
registers are single-byte registers and only the 8 MSBs of
the corresponding quantity are checked. To set a low level
threshold for the battery voltage of 3V, register L should
be programmed to 80h; a high temperature limit of 60°C
is programmed by setting register O to 8Eh.
I 2 C Protocol
The LTC2942 uses an I 2 C/SMBus compatible 2-wire open-
drain interface supporting multiple devices and masters
on a single bus. The connected devices can only pull the
bus wires LOW and they never drive the bus HIGH. The
bus wires must be externally connected to a positive sup-
ply voltage via a current source or pull-up resistor. When
the bus is idle, both SDA and SCL are HIGH. Data on the
I 2 C bus can be transferred at rates of up to 100kbit/s in
standard mode and up to 400kbit/s in fast mode.
Each device on the I 2 C/SMBus is recognized by a unique
address stored in that device and can operate as either a
transmitter or receiver, depending on the function of the
device. In addition to transmitters and receivers, devices
can also be classified as masters or slaves when perform-
ing data transfers. A master is the device which initiates a
data transfer on the bus and generates the clock signals
to permit that transfer. At the same time any device ad-
2942fa
12
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