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参数资料
| 型号： | DC1561A |
| 厂商： | Linear Technology |
| 文件页数： | 25/42页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD FOR LTC4278 |
| 设计资源： | DC1561A Design Files |
| 标准包装： | 1 |
| 主要目的： | 电源管理，以太网供电（POE） |
| 嵌入式： | 否 |
| 已用 IC / 零件： | LTC4278 |
| 已供物品： | 板 |
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LTC4278
31
4278fc
between the primary-side switch and secondary-side syn-
chronous switch(es) and the subsequent current spike in
thetransformer.Thisspikewillcauseadditionalcomponent
stress and a loss in regulator efficiency.
The primary gate delay resistor is set with the following
equation:
RPGDLY kW
( )=
tPGDLY ns
( )+47
9.01
A good starting point is 15k.
Soft-Start Function
The LTC4278 contains an optional soft-start function that
is enabled by connecting an external capacitor between
the SFST pin and ground. Internal circuitry prevents the
control voltage at the VCMP pin from exceeding that on
the SFST pin. There is an initial pull-up circuit to quickly
bring the SFST voltage to approximately 0.8V. From there it
chargestoapproximately2.8Vwitha20Acurrentsource.
The SFST node is discharged to 0.8V when a fault occurs.
A fault occurs when the current sense voltage is greater
than 200mV or the IC’s thermal (overtemperature) shut-
down is tripped. When SFST discharges, the VCMP node
voltage is also pulled low to below the minimum current
voltage. Once discharged and the fault removed, the
SFST charges up again. In this manner, switch currents
are reduced and the stresses in the converter are reduced
during fault conditions.
The time it takes to fully charge soft-start is:
tss =
CSFST 1.4V
20
A
=70kW CSFST F
( )
Switcher’s UVLO Pin Function
The UVLO pin provides a user programming undervoltage
lockout. This is typically used to provide undervoltage
lockout based on VIN. The gate drivers are disabled when
UVLO is below the 1.24V UVLO threshold. An external
resistive divider between the input supply and ground is
used to set the turn-on voltage.
The bias current on this pin depends on the pin volt-
age and UVLO state. The change provides the user with
adjustable UVLO hysteresis. When the pin rises above
the UVLO threshold a small current is sourced out of the
pin, increasing the voltage on the pin. As the pin voltage
drops below this threshold, the current is stopped, further
dropping the voltage on UVLO. In this manner, hysteresis
is produced.
Referring to Figure 13, the voltage hysteresis at VIN is
equal to the change in bias current times RA. The design
procedure is to select the desired VIN referred voltage
hysteresis, VUVHYS. Then:
RA =
VUVHYS
IUVLO
where:
IUVLO = IUVLOL – IUVLOH is approximately 3.4A
RB is then selected with the desired turn-on voltage:
RB =
RA
VIN(ON)
VUVLO
– 1
APPLICATIONS INFORMATION
VIN
RA
LTC4278
(13a) UV Turning On
UVLO
IUVLO
RB
VIN
RA
LTC4278
(13b) UV Turning Off
(13c) UV Filtering
UVLO
RB
VIN
RA2
RA1
CUVLO
RB
4278 F13
IUVLO
Figure 13. UVLO Pin Function and Recommended Filtering
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相关代理商/技术参数 |
参数描述 |
|---|---|
| DC1561B | 功能描述:EVAL BOARD FOR LTC4278 RoHS:是 类别:编程器，开发系统 >> 评估演示板和套件 系列:- 标准包装:1 系列:- 主要目的:数字电位器 嵌入式:- 已用 IC / 零件:AD5258 主要属性:- 次要属性:- 已供物品:板 相关产品:AD5258BRMZ1-ND - IC POT DGTL I2C1K 64P 10MSOPAD5258BRMZ10-ND - IC POT DGTL I2C 10K 64P 10MSOPAD5258BRMZ100-ND - IC POT DGTL I2C 100K 64P 10MSOPAD5258BRMZ50-ND - IC POT DGTL I2C 50K 64P 10MSOPAD5258BRMZ1-R7-ND - IC POT DGTL I2C 1K 64P 10MSOPAD5258BRMZ10-R7-ND - IC POT DGTL I2C 10K 64P 10MSOPAD5258BRMZ50-R7-ND - IC POT DGTL I2C 50K 64P 10MSOPAD5258BRMZ100-R7-ND - IC POT DGTL I2C 100K 64P 10MSOP |
| DC1561W | 制造商:Aleph America Corporation 功能描述: |
| DC1561W-COM | 制造商:Aleph America Corporation 功能描述: |
| DC1562A-A | 功能描述:BOARD EVAL LTC6990 RoHS:是 类别:编程器，开发系统 >> 评估演示板和套件 系列:TimerBlox® 标准包装:1 系列:- 主要目的:电信，线路接口单元（LIU） 嵌入式:- 已用 IC / 零件:IDT82V2081 主要属性:T1/J1/E1 LIU 次要属性:- 已供物品:板，电源，线缆，CD 其它名称:82EBV2081 |
| DC1562A-B | 功能描述:BOARD EVAL LTC6991 RoHS:是 类别:编程器，开发系统 >> 评估演示板和套件 系列:TimerBlox® 标准包装:1 系列:- 主要目的:电信，线路接口单元（LIU） 嵌入式:- 已用 IC / 零件:IDT82V2081 主要属性:T1/J1/E1 LIU 次要属性:- 已供物品:板，电源，线缆，CD 其它名称:82EBV2081 |
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