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参数资料
| 型号： | DC1561B |
| 厂商： | Linear Technology |
| 文件页数： | 28/42页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD FOR LTC4278 |
| 标准包装： | 1 |
| 主要目的： | 电源管理，以太网供电（POE） |
| 嵌入式： | 否 |
| 已用 IC / 零件： | LTC4278 |
| 已供物品： | 板 |
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LTC4278
34
4278fc
design evaluates the switcher for short-circuit protection
and adds any additional circuitry to prevent destruction.
Output Voltage Error Sources
The LTC4278’s feedback sensing introduces additional
minor sources of errors. The following is a summary list:
Theinternalbandgapvoltagereferencesetsthereference
voltage for the feedback amplifier. The specifications
detail its variation.
The external feedback resistive divider ratio directly
affects regulated voltage. Use 1% components.
Leakage inductance on the transformer secondary
reduces the effective secondary-to-feedback winding
turns ratio (NS/NF) from its ideal value. This increases
the output voltage target by a similar percentage. Since
secondary leakage inductance is constant from part to
part (within a tolerance) adjust the feedback resistor
ratio to compensate.
The transformer secondary current flows through the
impedances of the winding resistance, synchronous
MOSFET RDS(ON) and output capacitor ESR. The DC
equivalent current for these errors is higher than the
load current because conduction occurs only during
the converter’s off-time. So, divide the load current by
(1 – DC).
Iftheoutputloadcurrentisrelativelyconstant,thefeedback
resistive divider is used to compensate for these losses.
Otherwise, use the LTC4278 load compensation circuitry
(see Load Compensation). If multiple output windings are
used, the flyback winding will have a signal that represents
an amalgamation of all these windings impedances. Take
carethatyouexamineworst-caseloadingconditionswhen
tweaking the voltages.
Power MOSFET Selection
ThepowerMOSFETsareselectedprimarilyonthecriteriaof
on-resistance RDS(ON),inputcapacitance,drain-to-source
breakdown voltage (BVDSS), maximum gate voltage (VGS)
and maximum drain current (ID(MAX)).
For the primary-side power MOSFET, the peak current is:
IPK(PRI) =
PIN
VIN(MIN) DCMAX
1+ XMIN
2
APPLICATIONS INFORMATION
where XMINispeak-to-peakcurrentratioasdefinedearlier.
For each secondary-side power MOSFET, the peak cur-
rent is:
IPK(SEC) =
IOUT
1DCMAX
1+ XMIN
2
Select a primary-side power MOSFET with a BVDSS
greater than:
BVDSS ≥IPK
LLKG
CP
+ VIN(MAX) +
VOUT(MAX)
NSP
where NSP reflects the turns ratio of that secondary-to
primary winding. LLKG is the primary-side leakage induc-
tanceandCPistheprimary-sidecapacitance(mostlyfrom
the drain capacitance (COSS) of the primary-side power
MOSFET). A clamp may be added to reduce the leakage
inductance as discussed.
Foreachsecondary-sidepowerMOSFET,theBVDSSshould
be greater than:
BVDSS ≥ VOUT + VIN(MAX) NSP
Choose the primary-side MOSFET RDS(ON) at the nominal
gatedrivevoltage(7.5V).Thesecondary-sideMOSFETgate
drive voltage depends on the gate drive method.
Primary-side power MOSFET RMS current is given by:
IRMS(PRI) =
PIN
VIN(MIN) DCMAX
For each secondary-side power MOSFET RMS current is
given by:
IRMS(SEC) =
IOUT
1– DCMAX
Calculate MOSFET power dissipation next. Because the
primary-side power MOSFET operates at high VDS, a
transitionpowerlosstermisincludedforaccuracy.CMILLER
is the most critical parameter in determining the transition
loss, but is not directly specified on the data sheets.
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