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| 型号： | DC1571A-A |
| 厂商： | Linear Technology |
| 文件页数： | 6/24页 |
| 文件大小： | 0K |
| 描述： | BOARD SAR ADC LTC2383-16 |
| 软件下载： | QuikEval II System |
| 设计资源： | DC1571A Design Files DC1571A Schematic |
| 标准包装： | 1 |
| 系列： | QuikEval™ |
| ADC 的数量： | 1 |
| 位数： | 16 |
| 采样率（每秒）： | 1M |
| 数据接口： | 串行，SPI? |
| 输入范围： | ±2.5 V |
| 在以下条件下的电源（标准）： | 13mW @ 1MSPS |
| 工作温度： | 0°C ~ 70°C |
| 已用 IC / 零件： | LTC2383-16 |
| 已供物品： | 板 |
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LTC2383-16
14
238316f
Figure 10. 32k Point FFT of the LTC2383-16
FREQUENCY (kHz)
0
100
200
300
400
500
–180
AMPLITUDE
(dBFS)
–60
–40
–20
–80
–100
–120
–140
–160
0
238316 F10
SNR = 92.2dB
THD = –106.2dB
SINAD = 92dB
SFDR = 110.4dB
APPLICATIONS INFORMATION
Signal-to-Noise and Distortion Ratio (SINAD)
The signal-to-noise and distortion ratio (SINAD) is the
ratio between the RMS amplitude of the fundamental input
frequency and the RMS amplitude of all other frequency
components at the A/D output. The output is band-limited
to frequencies from above DC and below half the sampling
frequency. Figure 10 shows that the LTC2383-16 achieves
a typical SINAD of 92dB at a 1MHz sampling rate with a
20kHz input.
Signal-to-Noise Ratio (SNR)
The signal-to-noise ratio (SNR) is the ratio between the
RMS amplitude of the fundamental input frequency and
the RMS amplitude of all other frequency components
except the first five harmonics and DC. Figure 10 shows
that the LTC2383-16 achieves a typical SNR of 92dB at a
1MHz sampling rate with a 20kHz input.
Total Harmonic Distortion (THD)
Total Harmonic Distortion (THD) is the ratio of the RMS sum
of all harmonics of the input signal to the fundamental itself.
The out-of-band harmonics alias into the frequency band
between DC and half the sampling frequency (fSMPL/2).
THD is expressed as:
THD
VVV
V
N
=
++
+
20
23
4
1
22
2
log
…
where V1 is the RMS amplitude of the fundamental fre-
quency and V2 through VN are the amplitudes of the
second through Nth harmonics.
POWER CONSIDERATIONS
The LTC2383-16 provides two power supply pins: the
2.5V power supply (VDD), and the digital input/output
interface power supply (OVDD). The flexible OVDD supply
allows the LTC2383-16 to communicate with any digital
logic operating between 1.8V and 5V, including 2.5V and
3.3V systems.
Power Supply Sequencing
The LTC2383-16 does not have any specific power supply
sequencing requirements. Care should be taken to adhere
to the maximum voltage relationships described in the
Absolute Maximum Ratings section. The LTC2383-16
has a power-on-reset (POR) circuit that will reset the
LTC2383-16 at initial power-up or whenever the power
supply voltage drops below 1V. Once the supply voltage
reenters the nominal supply voltage range, the POR will
reinitialize the ADC. No conversions should be initiated
until 20μs after a POR event to ensure the reinitialization
period has ended. Any conversions initiated before this
time will produce invalid results.
TIMING AND CONTROL
CNV Timing
The LTC2383-16 conversion is controlled by CNV. A rising
edge on CNV will start a conversion. Once a conversion has
been initiated, it cannot be restarted until the conversion
is complete. For optimum performance, CNV should be
driven by a clean low jitter signal. Converter status is
indicated by the BUSY output which remains high while
the conversion is in progress. To ensure that no errors
occur in the digitized results, any additional transitions
on CNV should occur within 40ns from the start of the
conversion or after the conversion has been completed.
Once the conversion has completed, the LTC2383-16
begins acquiring the input signal.
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