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参数资料
| 型号： | DC1571A-C |
| 厂商： | Linear Technology |
| 文件页数： | 24/24页 |
| 文件大小： | 0K |
| 描述： | BOARD SAR ADC LTC2381-16 |
| 软件下载： | QuikEval II System |
| 设计资源： | DC1571A Design Files DC1571A Schematic |
| 标准包装： | 1 |
| 系列： | QuikEval™ |
| ADC 的数量： | 1 |
| 位数： | 16 |
| 采样率（每秒）： | 250k |
| 数据接口： | 串行，SPI? |
| 输入范围： | ±2.5 V |
| 在以下条件下的电源（标准）： | 3.25mW @ 250kSPS |
| 工作温度： | 0°C ~ 70°C |
| 已用 IC / 零件： | LTC2381-16 |
| 已供物品： | 板 |
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LTC2381-16
9
238116f
OVERVIEW
The LTC2381-16 is a low noise, low power, high speed 16-bit
successive approximation register (SAR) ADC. Operating
from a single 2.5V supply, the LTC2381-16 supports a
large ±2.5V fully differential input range, making it ideal
for high performance applications which require a wide
dynamic range. The LTC2381-16 achieves ±2LSB INL max,
no missing codes at 16-bits and 92dB SNR.
Fast 250ksps throughput with no cycle latency makes the
LTC2381-16 ideally suited for a wide variety of high speed
applications. An internal oscillator sets the conversion time,
easing external timing considerations. The LTC2381-16
dissipates only 3.25mW at 250ksps, while an auto
power-down feature is provided to further reduce power
dissipation during inactive periods.
The LTC2381-16 features a proprietary sampling
architecture that enables the ADC to begin acquiring the
next sample during the current conversion. The resulting
extended acquisition time of 3.25μs allows the use of
extremely low power ADC drivers.
APPLICATIONS INFORMATION
CONVERTER OPERATION
A rising edge on the CNV pin initiates a conversion. During
the conversion phase, the 16-bit CDAC is sequenced
through a successive approximation algorithm, effectively
comparing the sampled input with binary-weighted
fractions of the reference voltage (e.g. VREF/2, VREF/4 …
VREF/65536) using the differential comparator. At the end
of conversion, the CDAC output approximates the sampled
analog input. The ADC control logic then prepares the
16-bit digital output code for serial transfer.
TRANSFER FUNCTION
The LTC2381-16 digitizes the full-scale voltage of 2 × REF
into 216 levels, resulting in an LSB size of 76μV with
REF = 2.5V. The ideal transfer function is shown in Figure 2.
The output data is in 2’s complement format.
ANALOG INPUT
The analog inputs of the LTC2381-16 are fully differential
in order to maximize the signal swing that can be digitized.
The analog inputs can be modeled by the equivalent
TIMING DIAGRAM
POWER-UP
ACQUIRE
HOLD
POWER-DOWN
CONVERT
D15 D14 D13 D2 D1 D0
SDO
SCK
CNV
CHAIN, RDL/SDI = 0
BUSY
238116 TD01
Conversion Timing Using the Serial Interface
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