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| 型号： | DC742A |
| 厂商： | Linear Technology |
| 文件页数： | 19/28页 |
| 文件大小： | 0K |
| 描述： | BOARD DELTA SIGMA ADC LTC2449 |
| 软件下载： | QuikEval System |
| 设计资源： | DC742A Design File DC742A Schematic |
| 标准包装： | 1 |
| 系列： | QuikEval™ |
| ADC 的数量： | 1 |
| 位数： | 24 |
| 采样率（每秒）： | 8k |
| 数据接口： | MICROWIRE?，串行，SPI? |
| 已用 IC / 零件： | LTC2449 |
| 已供物品： | 板 |
| 相关产品： | LTC2449CUHF#PBF-ND - IC ADC 24BIT 38-QFN LTC2449IUHF#PBF-ND - IC ADC 24BIT HI SPEED 38QFN LTC2449IUHF#TRPBF-ND - IC ADC 24BIT HI SPEED 38QFN LTC2449CUHF#TRPBF-ND - IC ADC 24BIT HI SPEED 38QFN LTC2449IUHF-ND - IC ADC 24BIT HI SPEED 38QFN LTC2449CUHF-ND - IC ADC 24BIT HI SPEED 38QFN LTC2449CUHF#TR-ND - IC ADC 24BIT HI SPEED 38QFN LTC2449IUHF#TR-ND - IC ADC 24BIT HI SPEED 38QFN |
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LTC2444/LTC2445/
LTC2448/LTC2449
26
2444589fb
Example:
If an amplifier (e.g. LT1219) driving the input of an
LTC2444/LTC2445/LTC2448/LTC2449 has wideband
noise of 33nV/
√Hz, band-limited to 1.8MHz, the total
noise entering the ADC input is:
33nV/
√Hz √1.8MHz = 44.3V.
When the ADC digitizes the input, its digital filter filters out
the wideband noise from the input signal. The noise
reduction depends on the oversample ratio which defines
the effective bandwidth of the digital filter.
At an oversample of 256, the noise bandwidth of the ADC
is 787Hz which reduces the total amplifier noise to:
33nV/
√Hz √787Hz = 0.93V.
The total noise is the RMS sum of this noise with the 2
V
noise of the ADC at OSR=256.
√(0.93V)2 + (2uV)2 = 2.2V.
Increasing the oversample ratio to 32768 reduces the
noise bandwidth of the ADC to 6.2Hz which reduces the
total amplifier noise to:
33nV/
√Hz √6.2Hz = 82nV.
The total noise is the RMS sum of this noise with the 200nV
noise of the ADC at OSR = 32768.
√(82nV)2 + (200nV)2 = 216nV.
In this way, the digital filter with its variable oversampling
ratio can greatly reduce the effects of external noise
sources.
APPLICATIO S I FOR ATIO
WU
UU
Automatic Offset Calibration of External
Buffers/Amplifiers
The LTC2445/LTC2449 enable an external amplifier to be
inserted between the multiplexer output and the ADC
input. This enables one external buffer/amplifier circuit to
be shared between all 17 analog inputs (16 single-ended
or 8 differential). The LTC2445/LTC2449 perform an inter-
nal offset calibration every conversion cycle in order to
remove the offset and drift of the ADC. This calibration is
performed through a combination of front end switching
and digital processing. Since the external amplifier is
placed between the multiplexer and the ADC, it is inside the
correction loop. This results in automatic offset correction
and offset drift removal of the external amplifier.
The LT1368 is an excellent amplifier for this function. It
has rail-to-rail inputs and outputs, and it operates on a
single 5V supply. Its open-loop gain is 1M and its input
bias current is 10nA. It also requires at least a 0.1
F load
capacitor for compensation. It is this feature that sets it
apart from other amplifiers—the load capacitor attenu-
ates sampling glitches from the LTC2445/LTC2449 ADCIN
terminals, allowing it to achieve full performance of the
ADC with high impedance at the multiplexer inputs.
Another benefit of the LT1368 is that it can be powered
from supplies equal to or greater than that of the ADC. This
can allow the inputs to span the entire absolute maximum
of GND – 0.3V to VCC + 0.3V. Using a positive supply of
7.5V to 10V and a negative supply of –2.5 to –5V gives the
amplifier plenty of headroom over the LTC2445/LTC2449
input range.
Figure 16. Simple External Clock Source
28
2
29
38
37
8
9
36
3
24448 F17
35
1,4,5,6,31,32,33,39
REFERENCE
VOLTAGE
0.1V TO VCC
ANALOG INPUT
–0.5VREF TO
0.5VREF
3-WIRE
SPI INTERFACE
4.5V TO 5.5V
30
VCC
BUSY
FO
REF+
SCK
CH0
CH1
SDO
GND
CS
EXT
LTC2448
REF–
1
F
0.1
F
LTC1799
OUT
DIV
SET
GND
V+
RSET
NC
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