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参数资料
| 型号： | DC742A |
| 厂商： | Linear Technology |
| 文件页数： | 27/28页 |
| 文件大小： | 0K |
| 描述： | BOARD DELTA SIGMA ADC LTC2449 |
| 软件下载： | QuikEval System |
| 设计资源： | DC742A Design File DC742A Schematic |
| 标准包装： | 1 |
| 系列： | QuikEval™ |
| ADC 的数量： | 1 |
| 位数： | 24 |
| 采样率（每秒）： | 8k |
| 数据接口： | MICROWIRE?，串行，SPI? |
| 已用 IC / 零件： | LTC2449 |
| 已供物品： | 板 |
| 相关产品： | LTC2449CUHF#PBF-ND - IC ADC 24BIT 38-QFN LTC2449IUHF#PBF-ND - IC ADC 24BIT HI SPEED 38QFN LTC2449IUHF#TRPBF-ND - IC ADC 24BIT HI SPEED 38QFN LTC2449CUHF#TRPBF-ND - IC ADC 24BIT HI SPEED 38QFN LTC2449IUHF-ND - IC ADC 24BIT HI SPEED 38QFN LTC2449CUHF-ND - IC ADC 24BIT HI SPEED 38QFN LTC2449CUHF#TR-ND - IC ADC 24BIT HI SPEED 38QFN LTC2449IUHF#TR-ND - IC ADC 24BIT HI SPEED 38QFN |
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LTC2444/LTC2445/
LTC2448/LTC2449
8
2444589fb
Initially, the LTC2444/LTC2445/LTC2448/LTC2449 per-
form a conversion. Once the conversion is complete, the
device enters the sleep state. While in this sleep state,
power consumption is reduced below 10
A. The part
remains in the sleep state as long as CS is HIGH. The
conversion result is held indefinitely in a static shift
register while the converter is in the sleep state.
Once CS is pulled LOW, the device begins outputting the
conversion result. There is no latency in the conversion
result while operating in the 1x mode. The data output cor-
responds to the conversion just performed. This result is
shifted out on the serial data out pin (SDO) under the con-
trol of the serial clock (SCK). Data is updated on the falling
edge of SCK allowing the user to reliably latch data on the
rising edge of SCK (see Figure 3). The data output state is
concluded once 32 bits are read out of the ADC or when CS
is brought HIGH. The device automatically initiates a new
conversion and the cycle repeats.
Through timing control of the CS, SCK and EXT pins, the
LTC2444/LTC2445/LTC2448/LTC2449 offer several flex-
ible modes of operation (internal or external SCK). These
various modes do not require programming configuration
registers; moreover, they do not disturb the cyclic opera-
tion described above. These modes of operation are
described in detail in the Serial Interface Timing Modes
section.
Ease of Use
The LTC2444/LTC2445/LTC2448/LTC2449 data output
has no latency, filter settling delay or redundant data
associated with the conversion cycle while operating in
the 1X mode. There is a one-to-one correspondence
between the conversion and the output data. Therefore,
multiplexing multiple analog voltages is easy. Speed/
resolution adjustments may be made seamlessly be-
tween two conversions without settling errors.
The LTC2444/LTC2445/LTC2448/LTC2449 perform off-
set and full-scale calibrations every conversion cycle. This
calibration is transparent to the user and has no effect on
the cyclic operation described above. The advantage of
continuous calibration is extreme stability of offset and
full-scale readings with respect to time, supply voltage
change and temperature drift.
APPLICATIO S I FOR ATIO
WU
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Power-Up Sequence
The LTC2444/LTC2445/LTC2448/LTC2449 automatically
enter an internal reset state when the power supply
voltage VCC drops below approximately 2.2V. This fea-
ture guarantees the integrity of the conversion result and
of the serial interface mode selection.
When the VCC voltage rises above this critical threshold,
the converter creates an internal power-on-reset (POR)
signal with a duration of approximately 0.5ms. The POR
signal clears all internal registers. The conversion imme-
diately following a POR is performed on the input channel
IN+ = CH0, IN– = CH1 at an OSR = 256 in the 1X mode.
Following the POR signal, the LTC2444/LTC2445/LTC2448/
LTC2449 start a normal conversion cycle and follow the
succession of states described above. The first conver-
sion result following POR is accurate within the specifica-
tions of the device if the power supply voltage is restored
within the operating range (4.5V to 5.5V) before the end of
the POR time interval.
Reference Voltage Range
These converters accept a truly differential external refer-
ence voltage. The absolute/common mode voltage speci-
fication for the REF+ and REF– pins covers the entire range
from GND to VCC. For correct converter operation, the
REF+ pin must always be more positive than the REF– pin.
The LTC2444/LTC2445/LTC2448/LTC2449 can accept a
differential reference voltage from 0.1V to VCC. The con-
verter output noise is determined by the thermal noise of
the front-end circuits, and as such, its value in microvolts
is nearly constant with reference voltage. A decrease in
reference voltage will not significantly improve the
converter’s effective resolution. On the other hand, a
reduced reference voltage will improve the converter’s
overall INL performance.
Input Voltage Range
The analog input is truly differential with an absolute/
common mode range for the CH0-CH15 and COM input
pins extending from GND – 0.3V to VCC + 0.3V. Outside
these limits, the ESD protection devices begin to turn on
and the errors due to input leakage current increase
rapidly. Within these limits, the LTC2444/LTC2445/
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