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参数资料
| 型号： | DC951A |
| 厂商： | Linear Technology |
| 文件页数： | 18/40页 |
| 文件大小： | 0K |
| 描述： | BOARD DELTA SIGMA ADC LTC2481 |
| 软件下载： | QuikEval System |
| 设计资源： | DC951A Design File DC951A Schematic |
| 标准包装： | 1 |
| 系列： | Easy Drive™, QuikEval™ |
| ADC 的数量： | 1 |
| 位数： | 16 |
| 采样率（每秒）： | 7.5 |
| 数据接口： | I²C，串行，SPI? |
| 工作温度： | 0°C ~ 70°C |
| 已用 IC / 零件： | LTC2481 |
| 已供物品： | 板 |
| 相关产品： | LTC2481HDD#TRPBF-ND - IC ADC DELTA SIGMA 16BIT 10DFN LTC2481HDD#PBF-ND - IC ADC 16BIT I2C 7.5SPS 10DFN LTC2481CDD#TRPBF-ND - IC ADC 16BIT I2C 10-DFN LTC2481IDD#TRPBF-ND - IC ADC 16BIT I2C 10-DFN LTC2481IDD#PBF-ND - IC ADC 16BIT I2C 10-DFN LTC2481CDD#PBF-ND - IC ADC 16BIT I2C 10-DFN |
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LTC2481
25
2481fc
APPLICATIONS INFORMATION
the REF+ and REF– pins. For 50Hz mode, the related differ-
ence resistance is 1.2MΩ and the resulting full-scale error
is 0.42ppm for each ohm of source resistance driving the
REF+ and REF– pins. When CA0/f0 is driven by an external
oscillator with a frequency fEOSC (external conversion clock
operation), the typical differential reference resistance is
0.30 1012/fEOSC Ω and each ohm of source resistance
driving the REF+ or REF– pins will result in 1.67 10–6
fEOSCppm gain error. The typical +FS and –FS errors for
various combinations of source resistance seen by the
REF+ or REF– pins and external capacitance connected to
that pin are shown in Figures 16-19.
In addition to this gain error, the converter INL per-
formance is degraded by the reference source imped-
ance. The INL is caused by the input dependent terms
–VIN2/(VREF REQ) – (0.5 VREF DT)/REQ in the reference
Figure 16. +FS Error vs RSOURCE at REF+ or REF– (Small CREF)
Figure 17. –FS Error vs RSOURCE at REF+ or REF– (Small CREF)
Figure 18. +FS Error vs RSOURCE at REF+ or REF– (Large CREF)
Figure 19. –FS Error vs RSOURCE at REF+ or REF– (Large CREF)
RSOURCE (Ω)
0
+FS
ERROR
(ppm) 300
400
500
800
2481 F18
200
100
0
200
400
600
1000
VCC = 5V
VREF = 5V
VIN
+ = 3.75V
VIN
– = 1.25V
TA = 25°C
CREF = 1μF, 10μF
CREF = 0.1μF
CREF = 0.01μF
RSOURCE (Ω)
0
+FS
ERROR
(ppm)
50
70
90
10k
2481 F16
30
10
40
60
80
20
0
–10
10
100
1k
100k
VCC = 5V
VREF = 5V
VIN
+ = 3.75V
VIN
– = 1.25V
TA = 25°C
CREF = 0.01μF
CREF = 0.001μF
CREF = 100pF
CREF = 0pF
RSOURCE (Ω)
0
–FS
ERROR
(ppm) –200
–100
0
800
2481 F19
–300
–400
–500
200
400
600
1000
VCC = 5V
VREF = 5V
VIN
+ = 1.25V
VIN
– = 3.75V
TA = 25°C
CREF = 1μF, 10μF
CREF = 0.1μF
CREF = 0.01μF
RSOURCE (Ω)
0
–FS
ERROR
(ppm) –30
–10
10
10k
2481 F17
–50
–70
–40
–20
0
–60
–80
–90
10
100
1k
100k
VCC = 5V
VREF = 5V
VIN
+ = 1.25V
VIN
– = 3.75V
TA = 25°C
CREF = 0.01μF
CREF = 0.001μF
CREF = 100pF
CREF = 0pF
pin current as expressed in Figure 12. When using internal
oscillator and 60Hz mode, every 100Ω of reference source
resistance translates into about 0.67ppm additional INL
error. When using internal oscillator and 50Hz/60Hz mode,
every 100Ω of reference source resistance translates into
about 0.61ppm additional INL error. When using internal
oscillator and 50Hz mode, every 100Ω of reference source
resistance translates into about 0.56ppm additional INL
error. When CA0/f0 is driven by an external oscillator
with a frequency fEOSC, every 100Ω of source resistance
driving REF+ or REF– translates into about 2.18 10–6
fEOSCppm additional INL error. Figure 20 shows the typical
INL error due to the source resistance driving the REF+
or REF– pins when large CREF values are used. The user
is advised to minimize the source impedance driving the
REF+ and REF– pins.
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