参数资料
型号: DDC112U/1K
厂商: TEXAS INSTRUMENTS INC
元件分类: ADC
英文描述: 2-CH 20-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO28
封装: GREEN, PLASTIC, SOIC-28
文件页数: 23/34页
文件大小: 776K
代理商: DDC112U/1K
DDC112
3
SBAS085B
www.ti.com
ELECTRICAL CHARACTERISTICS
At TA = +25°C, AVDD = DVDD = +5V, DDC112U, Y: TINT = 500s, CLK = 10MHz, DDC112UK, YK: TINT = 333.3s, CLK = 15MHz, VREF = +4.096V, continuous mode
operation, and internal integration capacitors, unless otherwise noted.
Specifications same as DDC112U, Y.
NOTES: (1) Input is less than 1% of full scale. (2) CSENSOR is the capacitance seen at the DDC112 inputs from wiring, photodiode, etc. (3) FSR is Full-Scale Range.
(4) A best-fit line is used in measuring linearity. (5) Matching between side A and side B, not input 1 to input 2. (6) Voltage produced by the DDC112 at its input which
is applied to the sensor. (7) Range drift does not include external reference drift. (8) Input reference current decreases with increasing TINT (see the Voltage Reference
section). (9) Data format is Straight Binary with a small offset (see the
Data Retrieval section). (10) Ensured by design but not production tested.
DDC112U, Y
DDC112UK, YK
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
ANALOG INPUTS
External, Positive Full-Scale
Range 0
CEXT = 250pF
1000
pC
Internal, Positive Full-Scale
Range 1
47.5
50
52.5
pC
Range 2
95
100
105
pC
Range 3
142.5
150
157.5
pC
Range 4
190
200
210
pC
Range 5
237.5
250
262.5
pC
Range 6
285
300
315
pC
Range 7
332.5
350
367.5
pC
Negative Full-Scale Input
–0.4% of Positive FS
pC
DYNAMIC CHARACTERISTICS
Conversion Rate
2
3
kHz
Integration Time, TINT
Continuous Mode
500
1,000,000
333.3
s
Integration Time, TINT
Non-Continuous Mode
50
s
System Clock Input (CLK)
1
10
12
15
MHz
Data Clock (DCLK)
12
15
MHz
ACCURACY
Noise, Low-Level Current Input(1)
CSENSOR(2) = 0pF, Range 5 (250pC)
3.2
ppm of FSR(3), rms
CSENSOR = 25pF, Range 5 (250pC)
3.8
ppm of FSR, rms
CSENSOR = 50pF, Range 5 (250pC)
4.2
6.0
7
ppm of FSR, rms
Differential Linearity Error
±0.005% Reading ±0.5ppm
FSR (max)
Integral Linearity Error(4)
±0.005% Reading ±0.5ppm
FSR (typ)
±0.025% Reading ±1.0ppm
FSR (max)
No Missing Codes
20
Bits
Input Bias Current
TA = +25°C
0.1
10
pA
Range Error
Range 5 (250pC)
5
% of FSR
Range Error Match(5)
All Ranges
0.1
0.5
% of FSR
Range Sensitivity to VREF
VREF = 4.096 ±0.1V
1:1
Offset Error
Range 5, (250pC)
±200
±600
ppm of FSR
Offset Error Match(5)
±100
ppm of FSR
DC Bias Voltage(6) (Input VOS)
±0.05
±2
mV
Power-Supply Rejection Ratio
±25
±200
ppm of FSR/V
Internal Test Signal
13
pC
Internal Test Accuracy
±10
%
PERFORMANCE OVER TEMPERATURE
Offset Drift
±0.5
±3(10)
ppm of FSR/
°C
Offset Drift Stability
±0.2
±0.7(10) ppm of FSR/minute
DC Bias Voltage Drift
Applied to Sensor Input
3
±1
V/°C
Input Bias Current Drift
+25
°C to +45°C
0.01
1(10)
pA/
°C
Input Bias Current
TA = +75°C2
50(10)
pA
Range Drift(7)
Range 5 (250pC)
25
0
25
50(10)
ppm/
°C
Range Drift Match(5)
Range 5 (250pC)
±0.05
ppm/
°C
REFERENCE
Voltage
4.000
4.096
4.200
V
Input Current(8)
TINT = 500s
150
225
275
A
DIGITAL INPUT/OUTPUT
Logic Levels
VIH
4.0
DVDD + 0.3
V
VIL
–0.3
+0.8
V
VOH
IOH = –500A
4.5
V
VOL
IOL = 500A
0.4
V
Input Current, IIN
–10
+10
A
Data Format(9)
Straight Binary
POWER-SUPPLY REQUIREMENTS
Power-Supply Voltage
AVDD and DVDD
4.75
5.25
V
Supply Current
Analog Current
AVDD = +5V
14.8
15.2
mA
Digital Current
DVDD = +5V
1.2
1.8
mA
Total Power Dissipation
80
100
85
130
mW
TEMPERATURE RANGE
Specified Performance
–40
+85
0
+70
°C
Storage
–60
+100
°C
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