参数资料
型号: DK-DSP-3C120N
厂商: Altera
文件页数: 76/92页
文件大小: 0K
描述: KIT DEV DSP CYCLONE III EDITION
产品培训模块: Cyclone® III FPGA
Three Reasons to Use FPGA's in Industrial Designs
标准包装: 1
系列: Cyclone® III
类型: DSP
适用于相关产品: EP3C120
所含物品: 开发板,卡,设计样本,电源,线缆,软件和文档
产品目录页面: 605 (CN2011-ZH PDF)
相关产品: EP3C120F484I7-ND - IC CYCLONE III FPGA 120K 484FBGA
EP3C120F780I7-ND - IC CYCLONE III FPGA 120K 780FBGA
544-2539-ND - IC CYCLONE III FPGA 120K 780FBGA
544-2538-ND - IC CYCLONE III FPGA 120K 484FBGA
544-2528-ND - IC CYCLONE III FPGA 120K 484FBGA
544-2394-ND - IC CYCLONE III FPGA 119K 780FBGA
544-2393-ND - IC CYCLONE III FPGA 119K 780FBGA
544-2392-ND - IC CYCLONE III FPGA 119K 780FBGA
544-2391-ND - IC CYCLONE III FPGA 119K 780FBGA
544-2390-ND - IC CYCLONE III FPGA 119K 484FBGA
更多...
其它名称: 544-2566
Development Kits
Altera and Partner Development Kits
Product and Vendor Name
HD FIFO Modules
Averlogic
Broadcast Video Card
Bitec
Quad Video Board
Bitec
HDMI Receiver/Transmitter
Microtronix
Quad Link LVDS Interface
Microtronix
CX4 to HSMC Adapter
MorethanIP
PROCe V
GiDEL
ProcE
GiDEL
Device
Daughtercard
Daughtercard
Daughtercard
Daughtercard
Daughtercard
Daughtercard
Stratix V GX/GS (Gen3 x8)
5SGXMA3K2F40C3N
5SGXMA7K2F40C2N
5SGSMD8K2F40C2N
EP4S820E
EP3S340L
EP2S60F1020C4N
Description
This board is designed for evaluating the AL460A HD-FIFO. It has two embedded
AL460A-7-PBF (or AL460A-13-PBF) devices operating in parallel, expanding the
bus width to 32 bits. Control signals and data bus signals are available on two
50-pin connectors. A separate adaptor board (HSMC interface) is available for
connecting the module directly to a Cyclone III FPGA Starter Kit.
This card is designed for professional video equipment developers. The dual ASI/
SD-SDI interfaces allow access to industry-standard video transport signals. Based
on the latest adaptive cable equalizers and drivers, the ASI/SDI interfaces provide
excellent noise immunity up to cable lengths of 350 meters. A voltage-controlled
crystal oscillator (VCXO) allows precise synchronization to incoming ASI signals.
A DVB-T reference design using the Bitec BVDC daughtercard and a Cyclone III
FPGA Development Kit is available.
This board is based on the Texas Instruments TVP5154 quad video decoder. The
analog video inputs include composite video and S-video. Video output is based
on the Chrontel CH7010B device, enabling single-link DVI, component analog,
and composite analog outputs. The device accepts digital, parallel video data,
and clocking from the host FPGA via the HSMC connector, which configures and
monitors the device over an I 2 C link. A DVI output connector and mini-DIN output
connector are provided.
This daughtercard interfaces a HDMI receiver and transmitter to your Altera FPGA
development kit using the HSMC expansion connector. The receiver also supports
an analog component video (YCbCr) interface. The card uses the Analog Devices
AD9889 HDMI Transmitter and AD9880 HDMI Receiver to support HDTV formats
up to 1080p at 60 Hz. The receiver offers the flexibility of both an analog
interface and an HDMI receiver integrated on a single chip.
This daughtercard supports receive and transmit LVDS links, each consisting of
five data channels and one clock for a total of 48 LVDS channels. The standard
configuration of 20 TX + 4 clk and 20 RX + 2 clk, is capable of supporting LCD
display panels up to 1080p at 100/120 Hz. Onboard LVDS termination resistors
can be removed to convert receiver channels into transmitters as required to
support 12 bit or 14 bit color applications. It is used for capturing LVDS video
data, connecting to a camera link interface, or for connecting to LCD panels using
LVDS, mini-LVDS, RSDS, and PPDS low-voltage panel interface signaling.
This passive daughtercard for 10GbE CX-4 copper interconnect prototyping
features a four-lane differential 3.125 Gbps connector (CX-4) for 10GbE IEEE
802.3ak, a 160-pin HSMC to the main board, and compatibility with Stratix II GX
mother boards that use HSMC connectors.
This half-length PCIe x8 card is based on Altera’s Stratix V GX or GS FPGA and
is a versatile and efficient solution for high-performance network processing,
signal processing, and data acquisition. Combining it with GiDEL’s PROCWizard
software and data management IP cores, enhances productivity and portability,
and allows even greater processing efficiency. The platform features 16+ GB of
onboard memory includes DDR3 SDRAM and SRAM. Typical sustain throughput
of 8,000 GBps for internal memories and 25+ GBps for onboard memory.
Networking capabilities include one CXP connector cage suitable for 100GbE
Ethernet (100GBASE-CR10, 100GBASE-SR10), 3×40 GbE, or single Infiniband
12×QDR link, two SFP+ cage suitable for 10 GbE, and Optical Transport
Network. Additional I/O interfaces, 2× high-speed inter-board connectors
(up to 12×14.1Gb/s full duplex GPIO) for board to board and proprietary
daughterboards connectivity.
This Altera-based PCIe x4 platform is ideal for high-speed data acquisition,
algorithmic acceleration, IP validation, and verification of small SoCs. This board
has five levels of memory structure (8.5 GB+) with maximum sustain throughput
of 4,693 GBps for internal memories and 12 GBps for DRAM.
74
Altera Product Catalog
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2013
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www.altera.com
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